EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 412
EP3SE50F780I3N
Manufacturer Part Number
EP3SE50F780I3N
Description
Stratix III
Manufacturer
Altera
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Device Configuration Pins
11–52
Stratix III Device Handbook, Volume 1
VCCPGM
VCCPD
Table 11–14. Dedicated Configuration Pins on the Stratix III Device (Part 1 of 6)
Pin Name
User Mode
N/A
N/A
Configuration
Scheme
All
All
Pin Type
Power
Power
Dedicated power pin. Use this pin to power all
dedicated configuration inputs, dedicated
configuration outputs, dedicated configuration
bi-direction pins, and some of the dual
functional pins that are used for configuration.
You must connect this pin to 1.8-V, 2.5-V,
3.0-V, or 3.3-V. V
V to 3.3-V within 100 ms. If V
ramped up within this specified time, your
Stratix III device will not configure
successfully. If your system does not allow for
a V
must hold
supplies are stable.
Dedicated power pin. Use this pin to power the
I/O pre-drivers, the JTAG input and output
pins, and the design security circuitry.
You must connect this pin to 2.5-V, 3.0-V, or
3.3-V depending on the I/O standards
selected. For 3.3-V I/O standards,
V
3.0 V, for 2.5-V or below I/O standards, V
= 2.5 V.
V
3.0-V/3.3-V within 100 ms. If V
ramped up within this specified time, your
Stratix III device will not configure
successfully. If your system does not allow for
a V
must hold
supplies are stable.
CCPD
CCPD
CCPGM
CCPD
=3.3-V, for 3.0-V I/O standards, V
must ramp-up from 0-V to 2.5-V /
ramp-up time of 100 ms or less, you
ramp-up time of 100 ms or less, you
nCONFIG
nCONFIG
Description
CCPGM
low until all power
low until all power
must ramp-up from 0-
Altera Corporation
CCPGM
November 2007
CCPD
is not
is not
CCPD
CCPD
=
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