EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 294

• Manufacturer Part Number: EP3SE50F780I3N
• Description: Stratix III
• Manufacturer: Altera

Stratix III External Memory Interface Features
Figure 8–11. Stratix III DLL and I/O Bank Locations (Package-Bottom View)
8–24
Stratix III Device Handbook, Volume 1
PLL_L2
PLL_L3
PLL_L4
PLL_L1
1C
1A
1B
2C
2B
2A
DLL1
DLL2
6
6
6
6
8A
3A
8B
3B
The DLL can access the two adjacent sides from its location within the
device. For example, DLL 1 on the top left of the device can access the top
side (I/O banks 7A, 7B, 7C, 8A, 8B, and 8C) and the left side of the device
(I/O banks 1A, 1B, 1C, 2A, 2B, and 2C). This means that each I/O bank is
accessible by two DLLs, giving more flexibility to create multiple
3C
8C
PLL_T1
PLL_B1
Stratix III FPGA
PLL_B2
PLL_T2
7C
4C
4B
7B
4A
7A
Altera Corporation
6
November 2007
6
DLL4
DLL3
6
6
PLL_R4
PLL_R1
PLL_R3
PLL_R2
6C
6A
6B
5C
5B
5A