EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 409

• Manufacturer Part Number: EP3SE50F780I3N
• Description: Stratix III
• Manufacturer: Altera

Altera Corporation
November 2007
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After the first device completes configuration in a multi-device
configuration chain, its nCEO pin drives low to activate the second
device's nCE pin, which prompts the second device to begin
configuration. Therefore, if these devices are also in a JTAG chain, make
sure the nCE pins are connected to GND during JTAG configuration or
that the devices are JTAG configured in the same order as the
configuration chain. As long as the devices are JTAG configured in the
same order as the multi-device configuration chain, the nCEO of the
previous device will drive the nCE of the next device low when it has
successfully been JTAG configured.
You can place other Altera devices that have JTAG support in the same
JTAG chain for device programming and configuration.
1
For more information on configuring multiple Altera devices in the same
configuration chain, refer to the
chapter in the Configuration Handbook.
Figure 11–21
microprocessor.
Figure 11–21. JTAG Configuration of a Single Device Using a Microprocessor
Notes to
(1)
(2)
(3)
You should connect the pull-up resistor to a supply that provides an acceptable
input signal for all devices in the chain. V
specification of the I/O on the device.
You should connect the nCONFIG and
configuration scheme. If you use only the JTAG configuration, connect nCONFIG
to V
convenient on your board.
You must connect nCE to GND or drive it low for successful JTAG configuration.
Microprocessor
CC
Figure
JTAG configuration support has been enhanced and allows
more than 17 Stratix III devices to be cascaded in a JTAG chain.
, and MSEL[2..0] to ground. Pull DCLK either high or low, whichever is
ADDR
shows JTAG configuration of a Stratix III device with a
11–21:
Memory
DATA
V CC
Configuring Mixed Altera Device Chains
TRST
TDI
TCK
TMS
TDO
Stratix III Device
MSEL[2..0]
Stratix III Device Handbook, Volume 1
CC
should be high enough to meet the V
CONF_DONE
MSEL[2..0]
nSTATUS
nCONFIG
Configuring Stratix III Devices
(3) nCE
DCLK
nCEO
pins to support a non-JTAG
V CC
(2)
(2)
(2)
N.C.
GND
10 kΩ
(1)
V CC
(1)
10 kΩ
11–49
IH