EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 834

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EP3SE50F780I3N

Manufacturer Part Number
EP3SE50F780I3N
Description
Stratix III
Manufacturer
Altera
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I/O Timing
1–322
Stratix III Device Handbook, Volume 2
1.2-V
HSTL
CLASS I
1.2-V
HSTL
CLASS I
1.2-V
HSTL
CLASS I
3.0-V PCI
3.0-V
PCI-X
DIFFERENTIAL
1.2-V HSTL
CLASS I
Standard
Table 1–128. EP3SE110 Row Pins Output Timing Parameters (Part 6 of 6)
Table 1–129. EP3SE110 Column Pins Input Timing Parameters (Part 1 of 3)
I/O Standard
I/O
Strength
Current
4mA
6mA
8mA
GCLK
GCLK
Clock Parameter
PLL
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
Clock
PLL
PLL
PLL
PLL
PLL
Table 1–129
parameters for EP3SE110 devices for differential I/O standards.
Table 1–129
differential I/O standards.
t
t
t
t
SU
SU
H
H
Parameter
t
t
t
t
t
t
t
t
t
t
CO
CO
CO
CO
CO
CO
CO
CO
CO
CO
Industrial Commercial
specifies EP3SE110 Column Pins Input Timing parameters for
through
Industrial Commercial
Fast Model
Fast Model
Table 1–132
-0.818
-0.524
0.930
0.636
3.266
1.810
3.244
1.788
3.235
1.779
3.328
1.876
3.328
1.876
show the maximum I/O timing
-1.087 -1.129 -1.239 -1.181 -1.569
-1.054 -1.237 -1.362 -1.304 -1.216
V
1.235
1.202
1.1V
CCL
-2
=
4.809 5.355 5.664 5.515 5.767
2.517 2.798 2.877 2.854 2.806
4.791 5.333 5.642 5.493 5.745
2.499 2.782 2.855 2.832 2.784
4.789 5.333 5.642 5.493 5.745
2.497 2.785 2.855 2.832 2.784
4.813 5.326 5.632 5.483 5.739
2.526 2.798 2.838 2.816 2.787
4.813 5.326 5.632 5.483 5.739
2.526 2.798 2.838 2.816 2.787
V
1.1V
CCL
-2
V
1.296
1.404
1.1V
CCL
-3
=
=
V
1.1V
CCL
-3
V
1.422
1.545
1.1V
=
CCL
-4
=
V
1.1V
CCL
-4
Altera Corporation
V
1.355
1.478
1.1V
=
-4L
CCL
November 2007
V
1.1V
=
CCL
=
V
1.737
1.384
-4L
0.9V
-4L
CCL
V
0.9V
=
CCL
=
Units
ns
ns
ns
ns
Units
ns
ns
ns
ns
ns
ns
ns
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