EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 21

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EP3SE50F780I3N

Manufacturer Part Number
EP3SE50F780I3N
Description
Stratix III
Manufacturer
Altera
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Altera Corporation
November 2007
Note to
(1)
Stratix III
Logic
Family
Stratix III
Enhanced
Family
Table 1–1. Stratix III FPGA Family Features
The EP3SE260 device is rich in LE, memory, and multiplier resources. Hence, it aligns with both logic (L) and enhanced
(E) variants.
Table
EP3SE260
EP3SE110
EP3SE260
1–1:
EP3SL110
EP3SL150
EP3SL200
EP3SL340
EP3SE50
EP3SE80
EP3SL50
EP3SL70
Device/
Feature
(1)
ALMs
102K
135K
102K
19K
27K
43K
57K
80K
19K
32K
43K
Table 1–1
The Stratix III logic family (L) offers balanced logic, memory, and
multipliers to address a wide range of applications, while the enhanced
family (E) offers more memory and multipliers per logic and is ideal for
wireless, medical imaging, and military applications.
Stratix III devices are available in space-saving FineLine BGA packages
(see
107.5K
142.5K
337.5K
107.5K
Nios II embedded processor support
Support for multiple intellectual property megafunctions from
Altera
Program (AMPP)
47.5K
67.5K
47.5K
Table 1–2
200K
255K
255K
80K
LEs
lists the Stratix III FPGA family features.
®
blocks
1,040
MegaCore
M9K
108
150
275
355
468
864
400
495
639
864
and
Table
M144K
blocks
12
16
36
48
48
12
12
16
48
6
6
®
1–3).
functions and Altera Megafunction Partners
Blocks
MLAB
1,350
2,150
2,850
4,000
5,100
6,750
1,600
2,150
5,100
950
950
Embedded
RAM Kbits
14,688
16,272
14,688
1,836
2,214
4,203
5,499
9,396
5,328
6,183
8,055
Total
Stratix III Device Handbook, Volume 1
Stratix III Device Family Overview
MLAB
1,344
1,781
2,500
3,188
4,219
1,000
1,344
3,188
Kbits
594
844
594
Memory
11,896
17,876
20,491
17,876
2,430
3,058
5,547
7,280
5,922
7,183
9,399
Kbits
Total
(FIR Mode)
multipliers
18×18-bit
216
288
288
384
576
768
576
384
672
896
768
1–3
PLLs
12
12
12
12
4
4
8
8
4
8
8

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