LPC1810FET100,551 NXP Semiconductors, LPC1810FET100,551 Datasheet - Page 34
LPC1810FET100,551
Manufacturer Part Number
LPC1810FET100,551
Description
IC MCU 32BIT 136KB FLSH 100TFBGA
Manufacturer
NXP Semiconductors
Series
LPC18xxr
Datasheets
1.LPC1830FET256551.pdf
(87 pages)
2.LPC1810FET100551.pdf
(2 pages)
3.LPC1810FET100551.pdf
(1164 pages)
Specifications of LPC1810FET100,551
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, I²C, Microwire, SPI, SSI, SSP, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
64
Program Memory Size
-
Program Memory Type
ROMless
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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NXP Semiconductors
4.4 AES API calls
<Document ID>
User manual
4.4.1 Security API
The security API controls the AES block.
Table 11.
Function
AES_API_Set_Mode
AES_API_Load_Key_1
AES_API_Load_Key_2
AES_API_Load_Key_RNG
Fig 16. AES engine
Security API calls
Vpp 3V3
Vdd 1V2
JTAG
CPU
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
AHB2APB
OTP controller
Offset relative to
the API entry
point
0x00
0x04
0x08
0x0C
RNG
OTP0
AHB
AES_key
Defines AES engine operation mode
Loads randomly generated key in AES engine.
Description
Parameter: unsigned cmd with values:
0 - Reserved. Do not use.
1 - AES_API_CMD_DECODE_ECB
2 - Reserved. Do not use.
3 - AES_API_CMD_DECODE_CBC
Return - unsigned: see general error
codes.
Loads 128 bit AES user key 1
Parameter - void
Return - void
Loads 128 bit AES user key 2
Parameter - void
Return - void
Parameter - void
Return - void
Chapter 4: LPC18xx Security features
OTP1
Control Data
AES engine
OTP2
UM10430
GPDMA
© NXP B.V. 2011. All rights reserved.
34 of 1164
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