LPC1810FET100,551 NXP Semiconductors, LPC1810FET100,551 Datasheet - Page 929

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LPC1810FET100,551

Manufacturer Part Number
LPC1810FET100,551
Description
IC MCU 32BIT 136KB FLSH 100TFBGA
Manufacturer
NXP Semiconductors
Series
LPC18xxr

Specifications of LPC1810FET100,551

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, I²C, Microwire, SPI, SSI, SSP, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
64
Program Memory Size
-
Program Memory Type
ROMless
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
NXP Semiconductors
<Document ID>
User manual
40.9.6 Read Boot Code version number
40.9.7 Read device serial number
40.9.8 Compare <address1> <address2> <no of bytes>
Table 867. IAP Read Boot Code version number command
Table 868. IAP Read device serial number command
Table 869. IAP Compare command
Command
Input
Return Code
Result
Description
Command
Input
Return Code
Result
Description
Command
Input
Return Code
Result
Description
Read boot code version number
Command code: 55 (decimal)
Parameters: None
CMD_SUCCESS |
Result0: 2 bytes of boot code version number in ASCII format. It is to be
interpreted as <byte1(Major)>.<byte0(Minor)>
This command is used to read the boot code version number.
Read device serial number
Command code: 58 (decimal)
Parameters: None
CMD_SUCCESS |
Result0: First 32-bit word of Device Identification Number (at the lowest address)
Result1: Second 32-bit word of Device Identification Number
Result2: Third 32-bit word of Device Identification Number
Result3: Fourth 32-bit word of Device Identification Number
This command is used to read the device identification number. The serial number
may be used to uniquely identify a single unit among all LPC18xx devices.
Compare
Command code: 56 (decimal)
Param0(DST): Starting flash or RAM address of data bytes to be compared. This
address should be a word boundary.
Param1(SRC): Starting flash or RAM address of data bytes to be compared. This
address should be a word boundary.
Param2: Number of bytes to be compared; should be a multiple of 4.
CMD_SUCCESS |
COMPARE_ERROR |
COUNT_ERROR (Byte count is not a multiple of 4) |
ADDR_ERROR |
ADDR_NOT_MAPPED
Result0: Offset of the first mismatch if the Status Code is COMPARE_ERROR.
This command is used to compare the memory contents at two locations.
The result may not be correct when the source or destination includes any
of the first 64 bytes starting from address zero. The first 64 bytes can be
re-mapped to RAM.
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Chapter 40: LPC18xx flash programming interface
UM10430
© NXP B.V. 2011. All rights reserved.
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