LPC1810FET100,551 NXP Semiconductors, LPC1810FET100,551 Datasheet - Page 521

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LPC1810FET100,551

Manufacturer Part Number
LPC1810FET100,551
Description
IC MCU 32BIT 136KB FLSH 100TFBGA
Manufacturer
NXP Semiconductors
Series
LPC18xxr

Specifications of LPC1810FET100,551

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, I²C, Microwire, SPI, SSI, SSP, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
64
Program Memory Size
-
Program Memory Type
ROMless
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
NXP Semiconductors
<Document ID>
User manual
Fig 48. TxDMA operation in OSF mode
No
No
prev. frame’s TDES0
Write status word to
Write time stamp to
TxDMA suspended
for previous frame
TDES2 & TDES3
status available
Previous frame
Time stamp
present?
demand
(AHB)
error?
(AHB)
error?
Yes
No
Poll
Yes
Yes
All information provided in this document is subject to legal disclaimers.
Close intermediate
Rev. 00.13 — 20 July 2011
descriptor
No
No
No
prev. frame’s TDES0
Write status word to
Transfer data from
(Re-)fetch next
Start TxDMA
Time stamp
Frame xfer
complete?
descriptor
present?
buffer(s)
bit set?
(AHB)
(AHB)
(AHB)
error?
error?
error?
Own
Yes
No
No
Yes
No
Yes
Yes
Yes
Yes
Start
No
Chapter 22: LPC18xx Ethernet
Write time stamp to
for previous frame
TDES2 & TDES3
frame’s Tx status
Wait for previous
Stop TxDMA
Second
frame?
(AHB)
UM10430
error?
© NXP B.V. 2011. All rights reserved.
Yes
No
521 of 1164
Yes

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