LPC1810FET100,551 NXP Semiconductors, LPC1810FET100,551 Datasheet - Page 45

• Manufacturer Part Number: LPC1810FET100,551
• Description: IC MCU 32BIT 136KB FLSH 100TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1810FET100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, I²C, Microwire, SPI, SSI, SSP, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 64
• Program Memory Size: -
• Program Memory Type: ROMless
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

NXP Semiconductors
<Document ID>
User manual
When a HIGH level detect is active, the event router status bits cannot be cleared until the
signal is LOW. When a rising edge detect is active, the event router status bit can be
cleared right after the event has occurred.
Table 21.
Bit
0
1
2
3
4
5
6
Symbol
WAKEUP0_E
WAKEUP1_E
WAKEUP2_E
WAKEUP3_E
ATIMER_E
RTC_E
BOD_E
Edge configuration register (EDGE - address 0x4004 4004) bit description
All information provided in this document is subject to legal disclaimers.
Value Description
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Rev. 00.13 — 20 July 2011
Edge detect mode for WAKEUP0 event.
Level detect.
Edge detect. Detect falling edge if bit 0 in the HILO
register is 0. Detect rising edge if bit 0 in the HILO
register is 1.
Edge/level detect mode for WAKEUP1 event. The
corresponding bit in the EDGE register must be 0.
Level detect.
Edge detect. Detect falling edge if bit 1 in the HILO
register is 0. Detect rising edge if bit 1 in the HILO
register is 1.
Edge/level detect mode for WAKEUP2 event. The
corresponding bit in the EDGE register must be 0.
Level detect.
Edge detect. Detect falling edge if bit 2 in the HILO
register is 0. Detect rising edge if bit 2 in the HILO
register is 1.
Edge/level detect mode for WAKEUP3 event. The
corresponding bit in the EDGE register must be 0.
Level detect.
Edge detect. Detect falling edge if bit 30 in the HILO
register is 0. Detect rising edge if bit 3 in the HILO
register is 1.
Edge/level detect mode for alarm timer event. The
corresponding bit in the EDGE register must be 0.
Level detect.
Edge detect. Detect falling edge if bit 4 in the HILO
register is 0. Detect rising edge if bit 4 in the HILO
register is 1.
Edge/level detect mode for RTC event. The
corresponding bit in the EDGE register must be 0.
Level detect.
Edge detect. Detect falling edge if bit 5 in the HILO
register is 0. Detect rising edge if bit 5 in the HILO
register is 1.
Edge/level detect mode for BOD event. The
corresponding bit in the EDGE register must be 0.
Level detect.
Edge detect. Detect falling edge if bit 6 in the HILO
register is 0. Detect rising edge if bit 6 in the HILO
register is 1.
Chapter 6: LPC18xx Event router
UM10430
© NXP B.V. 2011. All rights reserved.
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Reset
value
0
0
0
0
0
0
0