LPC1810FET100,551 NXP Semiconductors, LPC1810FET100,551 Datasheet - Page 975

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LPC1810FET100,551

Manufacturer Part Number
LPC1810FET100,551
Description
IC MCU 32BIT 136KB FLSH 100TFBGA
Manufacturer
NXP Semiconductors
Series
LPC18xxr

Specifications of LPC1810FET100,551

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, I²C, Microwire, SPI, SSI, SSP, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
64
Program Memory Size
-
Program Memory Type
ROMless
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
NXP Semiconductors
<Document ID>
User manual
Table 921. DMA muxing register (DMAMUX, address 0x4004 311C) bit description
Bit
19:18
21:20
23:22
25:24
27:26
29:28
Symbol
DMAMUXCH9
DMAMUXCH10
DMAMUXCH11
DMAMUXCH12
DMAMUXCH13
DMAMUXCH14
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Value
0x0
0x1
0x2
0x3
0x0
0x1
0x2
0x3
0x0
0x1
0x2
0x3
0x0
0x1
0x2
0x3
0x0
0x1
0x2
0x3
0x0
0x1
0x2
0x3
Description
selects DMA to peripheral connection for
DMA peripheral 9:
SSP0 receive
I2S0 channel 0
Reserved
Reserved
selects DMA to peripheral connection for
DMA peripheral 10:
SSP0 transmit
I2S0 channel 1
Reserved
Reserved
selects DMA to peripheral connection for
DMA peripheral 11:
SSP1 receive
Reserved
Reserved
Reserved
selects DMA to peripheral connection for
DMA peripheral 12:
SSP1 transmit
I2S1 channel 0
Reserved
Reserved
selects DMA to peripheral connection for
DMA peripheral 13:
ADC0
AES input
Reserved
Reserved
selects DMA to peripheral connection for
DMA peripheral 14:
ADC1
AES output
Reserved
Reserved
Chapter 42: Appendix
UM10430
© NXP B.V. 2011. All rights reserved.
Reset
value
0
0
0
0
0
0
…continued
975 of 1164
Access
R/W
R/W
R/W
R/W
R/W
R/W

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