LPC1810FET100,551 NXP Semiconductors, LPC1810FET100,551 Datasheet - Page 815

• Manufacturer Part Number: LPC1810FET100,551
• Description: IC MCU 32BIT 136KB FLSH 100TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1810FET100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, I²C, Microwire, SPI, SSI, SSP, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 64
• Program Memory Size: -
• Program Memory Type: ROMless
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

NXP Semiconductors
Table 754. CAN status register (STAT, address 0x400E 2004 (C_CAN0) and 0x400A 4004 (C_CAN1)) bit description
Table 755. CAN error counter (EC, address 0x400E 2008 (C_CAN0) and 0x400A 4008 (C_CAN1)) bit description
<Document ID>
User manual
Bit
5
6
7
31:8
Bit
7:0
14:8
15
31:16 -
Symbol
TEC_7_0
REC_6_0
RP
Symbol
EPASS
EWARN
BOFF
-
…continued
36.6.1.3 CAN error counter
Value
0
1
-
Value
0
1
0
1
0
1
-
A status interrupt is generated by bits BOFF, EWARN, RXOK, TXOK, or LEC. BOFF and
EWARN generate an error interrupt, and RXOK, TXOK, and LEC generate a status
change interrupt if EIE and SIE respectively are set to enabled in the CANCTRL register.
A change of bit EPASS and a write to RXOK, TXOK, or LEC will never create a status
interrupt.
Reading the CANSTAT register will clear the Status Interrupt value in the CANIR register.
Description
Error passive
The CAN controller is in the error active state.
The CAN controller is in the error passive state as defined in the CAN
2.0 specification .
Warning status
Both error counters are below the error warning limit of 96.
At least one of the error counters in the EML has reached the error
warning limit of 96.
Busoff status
The CAN module is not in busoff state.
The CAN controller is in busoff state.
reserved
Description
Transmit error counter
Current value of the transmit error counter (maximum value 127)
Receive error counter
Current value of the receive error counter (maximum value 255).
Receive error passive
The receive counter is below the error passive level.
The receive counter has reached the error passive level as defined in the
CAN2.0 specification .
Reserved
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Chapter 36: LPC18xx C_CAN
UM10430
Reset
value
0
0
0
© NXP B.V. 2011. All rights reserved.
Reset
value
0
0
0
-
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Access
RO
RO
RO
Access
RO
RO
RO
-