LPC1810FET100,551 NXP Semiconductors, LPC1810FET100,551 Datasheet - Page 673
LPC1810FET100,551
Manufacturer Part Number
LPC1810FET100,551
Description
IC MCU 32BIT 136KB FLSH 100TFBGA
Manufacturer
NXP Semiconductors
Series
LPC18xxr
Datasheets
1.LPC1830FET256551.pdf
(87 pages)
2.LPC1810FET100551.pdf
(2 pages)
3.LPC1810FET100551.pdf
(1164 pages)
Specifications of LPC1810FET100,551
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, I²C, Microwire, SPI, SSI, SSP, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
64
Program Memory Size
-
Program Memory Type
ROMless
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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27.6.2.1 QEI Position register
27.6.2.2 QEI Maximum Position register
27.6.2.3 QEI Position Compare register 0
27.6.2.4 QEI Position Compare register 1
27.6.2.5 QEI Position Compare register 2
27.6.2 Position, index and timer registers
This register contains the current value of the encoder position. Increments or decrements
when encoder counts occur, depending on the direction of rotation.
Table 578. QEI Position register (POS - address 0x400C 600C) bit description
This register contains the maximum value of the encoder position. In forward rotation the
position register resets to zero when the position register exceeds this value. In reverse
rotation the position register resets to this value when the position register decrements
from zero.
Table 579. QEI Maximum Position register (MAXPOS - address 0x400C 6010) bit description
This register contains a position compare value. This value is compared against the
current value of the position register. Interrupts can be enabled to interrupt when the
compare value is less than, equal to, or greater than the current value of the position
register.
Table 580. QEI Position Compare register 0 (CMPOS0 - address 0x400C 6014) bit description
This register contains a position compare value. This value is compared against the
current value of the position register. Interrupts can be enabled to interrupt when the
compare value is less than, equal to, or greater than the current value of the position
register.
Table 581. QEI Position Compare register 1 (CMPOS1 - address 0x400C 6018) bit description
This register contains a position compare value. This value is compared against the
current value of the position register. Interrupts can be enabled to interrupt when the
compare value is less than, equal to, or greater than the current value of the position
register.
Table 582. QEI Position Compare register 2 (CMPOS2 - address 0x400C 601C) bit description
Bit
31:0
Bit
31:0
Bit
31:0
Bit
31:0
Bit
31:0
Symbol
POS
Symbol
MAXPOS
Symbol
PCMP0
Symbol
PCMP1
Symbol
PCMP2
All information provided in this document is subject to legal disclaimers.
Description
Current position value.
Description
Maximum position value.
Description
Position compare value 0.
Description
Position compare value 1.
Description
Position compare value 2.
Rev. 00.13 — 20 July 2011
Chapter 27: LPC18xx Quadrature Encoder Interface (QEI)
Reset value
0xFFFF FFFF
UM10430
Reset value
0
Reset value
0xFFFF FFFF
© NXP B.V. 2011. All rights reserved.
Reset value
0xFFFF FFFF
0
Reset value
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