r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 1534

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Section 35 USB Host Controller (USBH)
35.3.5
Writing 1 to a bit in this register sets the corresponding bit, while writing a 0 to a bit leaves the bit
unchanged.
Rev. 1.00 Oct. 01, 2007 Page 1468 of 1956
REJ09B0256-0100
Initial value :
Initial value :
Bit
31
30
29 to 7
6
5
4
3
R/W :
R/W :
Bit :
Bit :
HcInterruptEnable Register (USBHIE)
Bit Name
MIE
OC

RHCS
FNO
UE
RD
R/W
MIE
31
15
—
R
0
0
R/W
OC
30
14
—
R
0
0
Initial
Value
0
0
All 0
0
0
0
0
29
—
13
—
R
R
0
0
28
12
—
—
R
R
0
0
27
11
R/W
R/W
R/W
R
R/W
R/W
R/W
R/W
—
—
R
R
0
0
26
10
—
—
R
R
0
0
Description
MasterInterruptEnable
This bit is a global interrupt enable. Writing 1 allows
interrupts to be enabled via the specific enable bits
listed below.
OwnershipChangeEnable
0: Ignored
1: Interrupt due to Ownership Change is enabled.
Reserved
These bits are always read as 0. The write value should
always be 0
RootHubStatusChangeEnable
0: Ignored
1: Interrupt due to Root Hub Status Change is enabled.
FrameNumberOverflowEnable
0: Ignored
1: Interrupt due to Frame Number Overflow is enabled.
UnrecoverableErrorEnable
This function is not supported. Writing is ignored.
ResumeDetectedEnable
0: Ignored
1: Interrupt due to Resume Detected is enabled.
25
—
—
R
R
0
9
0
24
—
—
R
R
0
8
0
23
—
—
R
R
0
7
0
RHSC FNO
R/W
22
—
R
0
6
0
R/W
21
—
R
0
5
0
R/W
UE
20
—
R
0
4
0
R/W
RD
19
—
R
0
3
0
R/W
SF
18
—
R
0
2
0
WDH
R/W
17
—
R
0
1
0
R/W
SO
16
—
R
0
0
0