r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 840
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r5s77631ay266bgv
Manufacturer Part Number
r5s77631ay266bgv
Description
Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5S77631AY266BGV.pdf
(2026 pages)
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Section 22 Realtime Clock (RTC)
22.4.16 RTC Control Register 2 (RCR2)
RCR2 is an 8-bit readable/writable register used for periodic interrupt control, 30-second
adjustment, and frequency divider RESET and RTC count control.
RCR2 is basically initialized to H'09 by a power-on reset, except that the value of the PEF bit is
undefined. In a manual reset, bits other than RTCEN and START are initialized, while the value
of the PEF bit is undefined. In standby mode RCR2 is not initialized, and retains its current value.
Rev. 1.00 Oct. 01, 2007 Page 774 of 1956
REJ09B0256-0100
Bit
0
Bit Name
AF
Initial value:
Initial
Value
Undefined R/W
R/W:
Bit:
R/W
PEF
—
7
R/W
R/W
6
0
Description
Alarm Flag
Set to 1 when the alarm time set in those registers
among RSECAR, RMINAR, RHRAR, RWKAR,
RDAYAR, and RMONAR in which the ENB bit is set to
1 matches the respective counter values.
0: Alarm registers and counter values do not match
[Clearing condition]
When 0 is written to AF
1: Alarm registers and counter values match*
[Setting condition]
When alarm registers in which the ENB bit is set to 1
and counter values match*
Note: * Writing 1 does not change the value.
PES[2:0]
R/W
5
0
(Initial value)
R/W
4
0
RTCEN
R/W
3
1
R/W
ADJ
2
0
RESET
R/W
1
0
START
R/W
0
1
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