r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 617

Manufacturer Part Number

r5s77631ay266bgv

Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series

Manufacturer

Renesas Electronics Corporation.

Figures13.17 is an example of a single-write cycle in host bus bridge mode. Figure 13.18 is an

example of a single read cycle in host bus bridge mode. Figure 13.19 is an example of a burst

write cycle in normal mode. And Figure 13.20 is an example of a burst read cycle in normal mode.

Note that the response speed of DEVSEL and TRDY differs according to the connected target

device. In host bus bridge mode, master accesses always use single read/write cycles. The issuing

of configuration transfers is only possible in host bus bridge mode.

Master Read/Write Cycle Timing

Figure 13.17 Master Write Cycle in Host Bus Bridge Mode (Single)

PCI space address

Address parity

nth data parity

nth data byte enable

Rev. 1.00 Oct. 01, 2007 Page 551 of 1956

Section 13 PCI Controller (PCIC)

REJ09B0256-0100