r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 839

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r5s77631ay266bgv

Manufacturer Part Number
r5s77631ay266bgv
Description
Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Bit
7
6 to 5
4
3
2 to 1
Bit Name
CF
CIE
AIE
0
Initial
Value
Undefined R/W
Undefined R
0
Undefined R
R/W
R/W
R/W
Description
Carry Flag
This flag is set to 1 on generation of a second counter
carry, or a 64 Hz counter carry when the 64 Hz counter
is read. The count register value read at this time is not
guaranteed, and so the count register must be read
again.
0: No second counter carry, or 64 Hz counter carry
[Clearing condition]
When 0 is written to CF
1: Second counter carry, or 64 Hz counter carry when
[Setting conditions]
Generation of a second counter carry, or a 64 Hz
counter carry when the 64 Hz counter is read
When 1 is written to CF
Reserved
The initial value of these bits is undefined. A write to
these bits is invalid, but the write value should always
be 0.
Carry Interrupt Enable Flag
Enables or disables interrupt generation when the carry
flag (CF) is set to 1.
0: Carry interrupt is not generated when CF flag is set
1: Carry interrupt is generated when CF flag is set to 1
Alarm Interrupt Enable Flag
Enables or disables interrupt generation when the
alarm flag (AF) is set to 1.
0: Alarm interrupt is not generated when AF flag is set
1: Alarm interrupt is generated when AF flag is set to 1
Reserved
The initial value of these bits is undefined. A write to
these bits is invalid, but the write value should always
be 0.
when 64 Hz counter is read
64 Hz counter is read
to 1
to 1
Rev. 1.00 Oct. 01, 2007 Page 773 of 1956
Section 22 Realtime Clock (RTC)
REJ09B0256-0100

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