r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 417
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r5s77631ay266bgv
Manufacturer Part Number
r5s77631ay266bgv
Description
Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5S77631AY266BGV.pdf
(2026 pages)
- Current page: 417 of 2026
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11.4.5
CSnPCR is a 32-bit readable/writable register that specifies the timing for the PCMCIA interface
connected to area n (n = 5 and 6), the space property, and the assert/negate timing for the OE and
WE signals. The pulse widths of OE and WE are set using the wait control bits in CSnWCR.
CSnPCR is initialized to H'7700 0000 by a power-on reset or a manual reset.
Initial value:
Initial value:
Bit
31
30 to 28 SAA
27
R/W:
R/W:
Bit:
Bit:
CSn PCMCIA Control Register (CSnPCR)
Bit Name
31
−
15
−
R
R
0
0
R/W
R/W
30
14
1
0
TEDA
SAA
R/W
R/W
Initial
Value
0
111
0
29
13
1
0
R/W
R/W
28
12
1
0
R/W
R
R/W
R
R/W
27
−
11
−
R
0
0
R/W
R/W
26
10
1
0
Description
Reserved
This bit is always read as 0. The write value should
always be 0.
Space Property A
Specify the space property of PCMCIA connected to
first half of area 5 or 6.
000: ATA complement mode
001: Dynamic I/O bus sizing
010: 8-bit I/O space
011: 16-bit I/O space
100: 8-bit common memory
101: 16-bit common memory
110: 8-bit attribute memory
111: 16-bit attribute memory
Reserved
This bit is always read as 0. The write value should
always be 0.
TEDB
SAB
R/W
R/W
25
1
0
9
R/W
R/W
24
1
8
0
R/W
23
−
R
Section 11 Local Bus State Controller (LBSC)
0
7
0
PCWA
Rev. 1.00 Oct. 01, 2007 Page 351 of 1956
R/W
R/W
22
0
6
0
TEHA
R/W
R/W
21
0
5
0
PCWB
R/W
R/W
20
0
4
0
R/W
19
−
R
0
3
0
REJ09B0256-0100
R/W
R/W
18
0
2
0
PCIW
TEHB
R/W
R/W
17
0
1
0
R/W
R/W
16
0
0
0
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