r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 1638

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r5s77631ay266bgv

Manufacturer Part Number
r5s77631ay266bgv
Description
Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 36 USB Function Controller (USBF)
Figure 36.13 shows the normal operation of the USB function and firmware in isochronous-out
transfer.
EP4 has two up to 64-byte FIFOs, but the user can perform data transmission and read receive
data without being aware of this dual-FIFO configuration.
In isochronous transfer, transfer is occurred only once per one frame (1 ms). So, when SOF is
received, the FIFO buffer is switched automatically with hardware.
FIFO buffers are switched over by the SOF reception. Therefore, the FIFO buffer in which the
USB function receives the data from the host and the FIFO buffer in which the firmware reads the
receive data have different buffers, and a read and write of FIFO buffer are not competed.
Accordingly, the data read by the firmware is the data received in one frame before. The buffers of
FIFOs are switched over automatically by the SOF reception, so reading of data must be
completed within the frame.
The USB function receives data from the host after an out-token is received. If there is an error in
the data, set the internal TF flag to 1. If there is no error in the data, set the internal TS flag to 1.
In firmware, first, the processing routine of the isochronous transfer is called by SOF interrupt to
check the time stamp. Then data is read from the FIFO buffer. The flag information (TS, TF) is
read and decided if the data has an error. The flag information at this time represents the status of
the currently readable FIFO buffer.
SOF happens to be broken because of external cause during transmission from the host. In this
case, an operation flow is different from that in figure 36.13. As an example, figure 36.14 shows
the operation flow of a broken frame and a subsequent frame when SOF is broken once. When
SOF is broken, the FIFO buffer is not switched in current frame, and a time out interrupt is
occurred after time set by user has been elapsed. The USB function controller discards the data
which has been transmitted to the frame from the host.
The firmware detects the SOF break by the time out interrupt. In this case, the FIFO buffer
connected to the CPU does not read data since data has already been read. When the SOF interrupt
is occurred in the subsequent frame, the processing routine of the isochronous transfer is called
and the time stamps are compared. The time stamps do not much since the SOF break occurred in
the previous frame. Data is not read since the data in FIFO is not current one.
Rev. 1.00 Oct. 01, 2007 Page 1572 of 1956
REJ09B0256-0100

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