r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 404

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Section 11 Local Bus State Controller (LBSC)
Rev. 1.00 Oct. 01, 2007 Page 338 of 1956
REJ09B0256-0100
Bit
24
23 to 20 DACKBST
19, 18
17
Bit Name
OPUP
[3:0]

BREQEN
Initial
Value
0
All 0
All 0
0
R/W
R/W
R/W
R
R/W
Description
Control Output Pin Pull-Up Resistor Control
Specifies the pull-up resistor state (A25 to A0, BS, CS0
to CS2, CS4, CS5/CE1A, CS6/CE1B, RD, WEn,
RDWR, CE2A, and CE2B) when the control output pins
are high-impedance. This bit is initialized by a power-on
reset.
0: Pull-up resistors are on for control output pins (A25 to
1: Pull-up resistors are off for control output pins (A25 to
Note: In standby mode, the control output pins are
DACK Burst
Select assert period of DACKn signals of DMA burst
transfer mode during DMA transfer start to end.
0: DACKn signals does not keep assert from burst start
1: DACKn signals keep assert from burst start to end
DACKBST[3]: DACK3
DACKBST[2]: DACK2
DACKBST[1]: DACK1
DACKBST[0]: DACK0
Reserved
These bits are always read as 0. The write value should
always be 0.
BREQ Enable
Indicates whether or not an external bus request can be
accepted. This bit is initialized to the state where an
external bus request is not accepted at a power-on
reset.
0: An external bus request is not accepted
1: An external bus request is accepted
A0, BS, CS0 to CS2, CS4, CS5/CE1A, CS6/CE1B,
RD, WEn, RDWR, CE2A, and CE2B)
A0, BS, CS0 to CS2, CS4, CS5/CE1A, CS6/CE1B,
RD, WEn, RDWR, CE2A, and CE2B)
to end
pulled up, regardless of the bit setting.