r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 254

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Section 7 Caches
The operand cache of this LSI uses the 4-way set-associative, each way comprising 256 cache
lines. Figure 7.1 shows the configuration of the operand cache.
The instruction cache is 4-way set-associative, each way is comprising 256 cache lines. Figure 7.2
shows the configuration of the instruction cache.
Rev. 1.00 Oct. 01, 2007 Page 188 of 1956
REJ09B0256-0100
Virtual address
31
22
19
MMU
Entry selection
8
255
0
Figure 7.1 Configuration of Operand Cache (OC)
19 bits
Comparison
(way 0 to way 3)
Tag
Address array
Hit signal
(Way 0 to way 3)
1 bit 1 bit
U
V
3
32 bits
LW0
12
32 bits
10
LW1
Read data
32 bits
LW2
[12:5]
(way 0 to way3)
32 bits
Data array
LW3
5 4
32 bits
LW4
Longword (LW) selection
2
32 bits
Write data
LW5
0
32 bits
LW6
32 bits
LW7
LRU
6 bits