r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 917

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

23.3.36 Transmit/Relay Priority Control Mode Register (Port 1) (TSU_PRISL1)
TSU_PRISL1 sets the priority control mode when the transmission request from the E-DMAC to
E-MAC-1 comes into collision with port 0 to 1 relay operations. This register must not be written
to once after relay operations have been enabled (after the FWEN0 bit in TSU_FWEN0 or the
FWEN1 bit in TSU_FWEN1 is set to 1).
Bit
31 to 15
14 to 12
11 to 8
Initial value:
Initial value:
R/W:
R/W:
Bit:
Bit:
Bit Name

PRIMD1[2:0] All 0

31
15


R
R
0
0
R/W
30
14

R
0
0
PRIMD1[2:0]
R/W
29
13

R
0
0
Initial
Value
All 0
All 0
R/W
28
12

R
0
0
27
11


R
R
0
0
R/W
R
R/W
R
26
10


R
R
0
0
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
These bits set the priority control mode of E-MAC-1
transmission and port 0 to 1 relay operations.
H'0: Round robin
H'1: Transmission priority
H'2: Relay priority
H'4: Round robin, however switched to relay priority
H'5: Transmission priority, however switched to relay
Others: Setting prohibited
Reserved
These bits are always read as 0. The write value should
always be 0.
25

R

R
0
9
0
when relay FIFO use amount exceeds the
PRISL1[7:0] setting
priority when relay FIFO use amount exceeds the
PRISL1[7:0] setting
24

R

R
0
8
0
Section 23 Gigabit Ethernet Controller (GETHER)
R/W
23

R
0
7
0
R/W
Rev. 1.00 Oct. 01, 2007 Page 851 of 1956
22

R
0
6
0
R/W
21

R
0
5
0
R/W
PRISL1[7:0]
20

R
0
4
0
R/W
19

R
0
3
0
REJ09B0256-0100
R/W
18

R
0
2
0
17

R
0
1
0
R/W
16

R
0
0
0