r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 73

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Item
DDR-SDRAM
controller (DDRIF)
PCI controller
(PCIC)
Direct memory
access controller
(DMAC)
Features
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DDR-SDRAM interface: 32-bit data bus width
Supports the DDR266 or DDR200 SDRAM
DDR-SDRAM refreshing
 Programmable refreshing intervals (auto-refresh mode)
 Self-refresh mode
Supports a burst length of 2
Switching of big/little endian for external memory access is possible at
power-on reset
Capacity and bit width (bits) of connectable memory devices
 128-Mbit DDR-SDRAM (×16), two chips in parallel connection
 256-Mbit DDR-SDRAM (×16), two chips in parallel connection
 512-Mbit DDR-SDRAM (×16), two chips in parallel connection
 1-Gbit DDR-SDRAM (×16), two chips in parallel connection
PCI controller (Rev.2.2-compatible)
 32-bit bus
 33 MHz/66 MHz
Supports PCI master/slave
Supports the PCI host function
 Built-in bus arbiter
External input pin for clock exclusively used by the PCI bus
Interrupt requests can be sent to CPU
Six channels (four channels support external requests)
Transfer data size: Byte, word (2 bytes), longword (4 bytes), 16 or 32
bytes
Maximum number of transfers: 16,777,216
Address mode: Dual address mode
Bus modes: Selectable from cycle-steal and burst modes
Transfer requests: Selectable from external request (channels 0 to 3
only), on-chip peripheral module request, and auto-request mode
Priority: Selectable from fixed channel priority mode and round-robin
mode
Rev. 1.00 Oct. 01, 2007 Page 7 of 1956
Section 1 Overview
REJ09B0256-0100