r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 363

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

The priority order of the on-chip modules is specified as desired by setting priority levels from 31
to 0 in INT2PRI0 to INT2PRI14. The priority order of the on-chip modules is set to 0 by a reset.
When the priorities for multiple interrupt sources are set to the same level and such interrupts are
generated simultaneously, they are handled according to the default priority order shown in table
9.7.
Updating of INTPRI and INT2PRI0 to INT2PRI14 should only be carried out when the BL bit in
SR is set to 1. To prevent erroneous interrupt acceptance, first read one of the interrupt priority
level setting registers, then clear the BL bit to 0. This will secure the necessary timing internally.
Table 9.7
L: Low
NMI
IRL
H: High
level
input
level
input
(See
table
9.6)
Interrupt Source
—
IRL[7:4] = LLLL
(H'0)
IRL[3:0] = LLLL
(H'0)
IRL[7:4] = LLLH
(H'1)
IRL[3:0] = LLLH
(H'1)
IRL[7:4] = LLHL
(H'2)
IRL[3:0] = LLHL
(H'2)
IRL[7:4] = LLHH
(H'3)
IRL[3:0] = LLHH
(H'3)
IRL[7:4] = LHLL
(H'4)
IRL[3:0] = LHLL
(H'4)
Interrupt Exception Handling and Priority
INTEVT
Code
H'1C0 16
H'200 15
H'220 14
H'240 13
H'260 12
H'280 11
Interrupt
Priority
MASK/CLEAR
Register
—
INTMSK2[15]
INTMSKCLR2[15]
INTMSK2[31]
INTMSKCLR2[31]
INTMSK2[14]
INTMSKCLR2[14]
INTMSK2[30]
INTMSKCLR2[30]
INTMSK2[13]
INTMSKCLR2[13]
INTMSK2[29]
INTMSKCLR2[29]
INTMSK2[12]
INTMSKCLR2[12]
INTMSK2[28]
INTMSKCLR2[28]
INTMSK2[11]
INTMSKCLR2[11]
INTMSK2[27]
INTMSKCLR2[27]
Rev. 1.00 Oct. 01, 2007 Page 297 of 1956
Interrupt
Source
Register
—
—
—
—
—
—
—
—
—
—
—
Section 9 Interrupt Controller (INTC)
Detail
Source
Register
—
—
—
—
—
—
—
—
—
—
—
Priority
in the
Source
—
REJ09B0256-0100
Default
Priority
High
Low