mt90502ag2 Zarlink Semiconductor, mt90502ag2 Datasheet - Page 117

• Manufacturer Part Number: mt90502ag2
• Description: Multi-channel Aal2 Sar
• Manufacturer: Zarlink Semiconductor

Address: 172h
Label: fastclk_pll_conf1
Reset Value: 09FCh
pll_vcod
pll_pd
pll_div
pll_syncen
pll_chp
reserved
Address: 174h
Label: h100pll_conf0
Reset Value: 07FEh
H100pll_vcod
H100pll_pd
H100pll_div
H100pll_syncen
H100pll_chp
reserved
Address: 17Eh
Label: chip_and_revision
Reset Value: 0101h
chip_id[7:0]
rev_id[7:0]
Label
Label
Label
Bit Position
Bit Position
Bit Position
Table 42 - Fast Clock PLL Configuration Register 1
Table 43 - H100/H110 PLL Configuration Register 0
15:14
15:14
13:9
13:9
1:0
7:3
1:0
7:3
15:8
2
8
7:0
2
8
Type
Type
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RO
RO
Table 44 - ID Register
Zarlink Semiconductor Inc.
MT90502
Output frequency range selection bits = “00”
‘0’ for normal operation. Power Down = ‘1’.
Divider = “11111”
Forces PLL into a clock synchronisation mode = ‘1’
Charge Pump settings = “01000”
Reserved. Must always be “00”
Output frequency range selection bits = “10”
‘0’ for normal operation. Power Down = ‘1’.
Divider = “11111”
Forces PLL into a clock synchronisation mode = ‘1’
Charge Pump settings = “00011”
Reserved. Must always be “00”
Chip ID = 01h.
Revision ID = 01h.
117
Description
Description
Description
Data Sheet