mt90502ag2 Zarlink Semiconductor, mt90502ag2 Datasheet - Page 42

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mt90502ag2

Manufacturer Part Number
mt90502ag2
Description
Multi-channel Aal2 Sar
Manufacturer
Zarlink Semiconductor
Datasheet
2.2.4
Once PCM/ADPCM and HDLC data is segmented into CPS-Packets, the CPS-Packet final assembly structure is
referenced and the packaging is completed through the addition of the CID, UUI, LI and HEC. Finally, the
CPS-Packets are directed to the correct location in the CPS-Packet Buffer (according to the channel number for
that CPS-Packet) from which the TX SAR will read them.
The UUI can be sourced from a “raw” AAL2 CPS-Packet, the 5 MSBs of the control byte of an HDLC packet, or, the
LSBs can be a one-bit to four-bit free-running counter. When the UUI is used as a counter, the MSB must be 0.
The CPS-Packet final assembly structure contains two monitoring fields: a 32-bit byte count and a 32-bit
CPS-Packet count. The CPS-Packet count indicates the number of complete CPS-Packets that have been
generated using this structure, and the byte count indicates the number of data bytes contained in all those
CPS-Packets, excluding the AAL2 headers.
VC Number : Number of the VC in which the CPS-Packet of this AAL2 Channel will be routed.
Packet Delete Count: Indicates the number of packet that must be deleted (not sent) before the AAL2 Channels starts. 0 means send immediately. 15 means
never send. 1 to 14 means delete the first 1 to 14 CPS-Packets generated. At start-up, this field may be set to 1 or more in order to never send garbage on an
AAL2 Channel.
CID : Channel ID on AAL2 VCs that will be annexed to the CPS-Packets.
Seq I : This value indicates by how much the sequence number should increment each time a packet is sent. If 0, incremented by 1. If 1, incremented by 2, and so on.
Send UUI: Send this UUI value. These are the four lower bits of the UUI that will be sent in all AAL2 CPS-Packets. The 0 to 3 lower bits of this field can be
substituted by the 0 to 3 lower bits of the CPS-Packet Count, depending on the Send UUI Increment Field.
SUI: Send UUI Increment. When “000” = 4 bits used as counter; “001” = 3 bits used as counter; “010” = 2 bits used as counter; “011” = 1 bits used as counter; “100”
= 0 bits used as counter; others = resereved.
# EDU: Number of EDUs in each CPS-Packet. “000” = one EDU; “001” = two EDUs; “010” = three EDUs; “011” = four EDUs; “100” = five EDUs; “101” = 44/88 frame
PCM/ADPCM32; “110” = 40/80 frame PCM/ADPCM32; “111” = eight EDUs.
CPS-Packet Byte Count : Byte counter of all payload bytes sent (payload is defined as the LI+1 in each CPS-Packet).
CPS-Packet Count: CPS-Packet counter of all sent packets.
Fields in Italic are used by Hardware only
Fields in Plain are written to by the CPU/Software.
CPS-Packet Final Assembly structures are located in TX
SSRAM at addresses +1000h to +1FE0h, +2000h to
+3FE0h, +4000h to +7FE0h and +8000h to +FFE0h for
128, 256, 512 and 1023 channels repsectively.
Each structure is 32 bytes in size.
CPS-Packet Final Assembly
+7FC0h
+7FE0h
+0000h
+0020h
CPS-Packet Final Assembly Structure Table
The number of structures in this table can
be programmed to {128, 256, 512, 1023}
CPSPFAS Channel 1022
CPSPFAS Channel 1023
CPSPFAS Channel 0
CPSPFAS Channel 1
Figure 15 - CPS-Packet Final Assembly Structure (PCM/ADPCM)
Reserved
Zarlink Semiconductor Inc.
+0h
+2h
+4h
+6h
+8h
+Ah
+Ch
+Eh
+10h
+12h
+14h
+16h
+18h
+1Ah
+1Ch
+1Eh
MT90502
CPS-Packet Final Assembly Structure (xxPCM w/o Silence Suppression)
b15
b14
42
VC Number[9:0]
b13
b12
CID
b11
# of EDU
CPS-Packet Byte Count[31:16]
CPS-Packet Byte Count[15:0]
b10
CPS-Packet Count[31:16]
CPS-Packet Count[15:0]
b9
b8
b7
b6
SUI
b5
Seq I
b4
b3
Pack Del Cnt
Send UU[3:0]
b2
b1
b0
Data Sheet

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