mt90502ag2 Zarlink Semiconductor, mt90502ag2 Datasheet - Page 64
mt90502ag2
Manufacturer Part Number
mt90502ag2
Description
Multi-channel Aal2 Sar
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT90502AG2.pdf
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2.5
2.5.1
The RX TDM Module is responsible for reading bytes written to circular buffers in external memory by the RX SAR
and administering the data to the H.100/H.110 interface module (see Section 2.7, “H.100/H.110 Interface,” on
page 77). The RX TDM Module is capable of transmitting data in 1023 time slots on the H.100/H.110 bus.
TDM Reception
Overview
PCM/HDLC Circular
Buffers in SSRAM
CPS-Packet buffer
Cell sent to RX
data cell buffer
Sent to RX CPU
CPS-Packet
Written to a PCM
Circular Buffer in
CPS-Packet
SSRAM
ATM Cell Received on
Associated Link-List
Bytes send on
Into CPS-Packets
H.100/H.110
PCM/HDLC
Figure 28 - RX Cell Flow
Zarlink Semiconductor Inc.
Cell Broken up
CID/UUI Table
Look-up Table
H.100/H.110
RX Cell Flow
UTOPIA Port
RX Channel
Consulted
Consulted
Consulted
MT90502
64
(after Zero Insertion)
Buffer in SSRAM
HDLC Circular
Written to an
CPS-Packet
Loopback Memory
Low Latency
SSCS Error Report
CPS Error Report
retransmitted on
UTOPIA Port
(optional)
(optional)
Cell
Data Sheet
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