mt90502ag2 Zarlink Semiconductor, mt90502ag2 Datasheet - Page 186

• Manufacturer Part Number: mt90502ag2
• Description: Multi-channel Aal2 Sar
• Manufacturer: Zarlink Semiconductor

t1
t2_reads
t2_non_muxed cpu_rdy_ndtack rising edge to
t4
t5
t6
t8
t13
Symbol
cpu_a[14:0]/cpu_a_das
read_access_active
cpu_rdy_ndtack
(when both CS and RD are low)
cpu_d[15:0]
read_access_active falling edge to cpu_a
valid cpu_a_das valid
cpu_rdy_ndtack rising edge to
read_access_active rising edge (reads)
cpu_a invalid (non-multiplexed)
cpu_a_das invalid (non-multiplexed)
read_access_active falling edge to
cpu_rdy_ndtack falling edge
Read Access Time
read_access_active rising edge to
cpu_rdy_ndtack tri-state
read_access_active falling edge to cpu_d
driven
cpu_d valid to cpu_rdy_ndtack rising edge
Table 203 - Non-Multiplexed CPU Interface - Intel Mode - Read Access
Figure 72 - Non-Multiplexed CPU Interface - Intel Mode - Read Access
Description
t1
t4
Zarlink Semiconductor Inc.
t8
MT90502
t5
186
0
0
0
3 * upclk - 4
upclk - 4
t13
Min.
t2_reads
t2_non_muxed
Typical
t6
Read Access Times,”
See Table 205, “t5
on page 190.
2 * upclk - 4
Max.
12
10
Data Sheet
ns
ns
ns
ns
ns
ns
ns
Unit