mt90502ag2 Zarlink Semiconductor, mt90502ag2 Datasheet - Page 48

• Manufacturer Part Number: mt90502ag2
• Description: Multi-channel Aal2 Sar
• Manufacturer: Zarlink Semiconductor

Packet Descriptor
Write Pointer
Pending Payload
Bytes
V: Valid Bit
Cell Expired Time
Stamp
Packet Descriptor
Read Pointer
Current Packet
Offset
PS: Prevent
Scanning
SA: Send Always
Pending Packet
Time-out Period
TXD:
Transmission
Destination
Field
Byte Address
Offset/Bits
+8/b[15:12]
+2/b[14:0]
+4/b[15:7]
+6/b[13:0]
0/b[15:7]
+4/b[6:0]
+2/b[15]
+6/b[15]
+6/b[14]
0/b[6:1]
Used
Table 21 - AAL2 VC Structure Fields
Written by the TX TDM module to denote the address of next
CPS-Packet Descriptor in the CPSPDQ. The CPSPDQ is deemed full
when the Packet Descriptor Write Pointer is one less than the Packet
Descriptor Read Pointer.
Indicates the number of pending payload bytes (CPS-Packet payload
and header bytes) available to the associated VC. The range is 0 to
46. This field is updated by the TX TDM process with the remaining
ATM cell pending payload bytes when a Cell Assembly Event is
raised. Reset is performed by the TXSAR's scanning process.
Associated to the Cell Expired Time-Stamp. If this bit is '1', then the
time-stamp must be taken into account. Otherwise, it is ignored and
no cells can be assembled.
This is an absolute time stamp at which a pending cell must be
transmitted. This field is set by the TDM process any time a
CPS-Packet is written that starts at or overlaps a cell boundary. It will
be written to the current time plus the Pending Packet Time-out
Period field in this structure. This field will be cleared by the TDM
process any time no CPS-Packets are pending. It will also be cleared
by the TXSAR's scanning process if it is detected to have timed-out,
and a cell Transmission Event is scheduled by this same process.
The time unit for the time-out is 125 µs.
Read pointer to the current CPS-Packet (Descriptor) in the CPSPDQ.
Updated by the TXSAR.
This field indicates how many bytes are remaining in a CPS-Packet
when the CPS-Packet is straddling two cells.
When this bit is '1', the pending packet time-out period will be ignored,
and the V bit will never be written back to '1'.
When '1', a maximum of one CPS-Packet will be contained in each
cell. The remainder of the last cell to contain a CPS-Packet will
always be zero padded to make sure that no other CPS-Packets join
it.
This is the maximum period set by the software that a Pending
CPS-Packet exist before transmission. The value is in multiples of
125 µs. 0 means between 0 and 124 µs.
000 do not send
0xx1 UTOPIA TX Port A
0x1x UTOPIA TX Port B
01xx UTOPIA TX Port C
1000 UTOPIA RX Port A
1001 UTOPIA RX Port B
1010 UTOPIA RX Port C
others reserved
Zarlink Semiconductor Inc.
MT90502
48
Description of Field
Data Sheet