mt90502ag2 Zarlink Semiconductor, mt90502ag2 Datasheet - Page 178
mt90502ag2
Manufacturer Part Number
mt90502ag2
Description
Multi-channel Aal2 Sar
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT90502AG2.pdf
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3.8
Address: 802h
Label: status0
Reset Value: 0000h
cell_assembly_event_buf_overflow
pointa_buf_overflow
pointb_buf_overflow
reserved
Address: 804h
Label: status0_ie
Reset Value: 0000h
cell_assembly_event_buf_overflow
pointa_buf_overflow
pointb_buf_overflow
reserved
Address: 810h
Label: tone_buffer_control
Reset Value: 0000h
sdram_tone_base
sdram_tone_size
sdram_tone_enable
ssram_tone_enable
reserved
Miscellaneous Registers
Label
Label
Label
Position
Table 189 - Miscellaneous Interrupt Enable Register
15:9
Bit
4:0
6:5
7
8
Table 188 - Miscellaneous Status Register
Table 190 - Tone Buffer Control Register
Position Type
Position Type
Type
RW Represents bits 23:19 of the byte address to the SDRAM tone buffers
RW “00” = 16KBytes, “01” = 32K, “10” = 64K, “11” = reserved. Size is for a
RW Enables the use of the tones contained in the SDRAM.
RW Enables the use of the tones contained in the SSRAM.
RW Reserved. Must always be “0000_000”
15:3
15:3
Bit
Bit
0
1
2
0
1
2
single buffer.
Zarlink Semiconductor Inc.
ROL Overflow in the cell assembly event queue. Fatal chip error.
ROL Overflow in the clock recovery point A buffer.
ROL Overflow in the clock recovery point B buffer.
ROL Reserved. Always read as “0000_0000_0000_0”
RO Reserved. Always read as “0000_0000_0000_0”
IE
IE
IE
MT90502
When ‘1’ and the corresponding status bit is ‘1’ an interrupt
When ‘1’ and the corresponding status bit is ‘1’ an interrupt
When ‘1’ and the corresponding status bit is ‘1’ an interrupt
will be generated.
will be generated.
will be generated.
178
Description
Description
Description
Data Sheet
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