mt90502ag2 Zarlink Semiconductor, mt90502ag2 Datasheet - Page 30

• Manufacturer Part Number: mt90502ag2
• Description: Multi-channel Aal2 Sar
• Manufacturer: Zarlink Semiconductor

2.2.2.1
An Encoding Data Unit (EDU) consists of 8 PCM or ADPCM data blocks. A data block is 8-bits for uncompressed
PCM and 5-, 4-, 3-, or 2-bits for ADPCM compression rates of 40, 32, 24, or 16 kbps, respectively. AAL2
CPS-Packets may contain 1-, 2-, 3-, 4-, 5-, or 8-EDUs. The MT90502 also supports 44-byte PCM, 44-byte 32 K
ADPCM and 40-byte 32K-ADPCM CPS-Packets as per ATM Forum requirement for Loop Emulation Service.
40/80 frame PCM/ADPCM represents 40-byte 32 K ADPCM, and 44/88 frame PCM/ADPCM represents both
44-byte PCM and 44-byte 32 K ADPCM.
2.2.2.2
Two different formats are available for transferring PCM/ADPCM samples on the H.100/H.110 bus. The first format,
Format A, uses a single time slot on the H.100/H.110 bus to transfer a sample. This format does not allow
distinguishing between PCM and ADPCM samples and therefore does not allow automatic switching between
PCM and ADPCM samples.
If a channel is configured as ADPCM, its compression rate can be determined on a byte by byte basis. This is done
by using a certain byte format (see Figure 8) on the TDM bus in which the nibble is placed in either the high bits or
the low bits of the byte, followed by a '1' and padding the rest of the byte with '0's. By so doing, the compression
rate of the sample is coded implicitly into the byte. As a CPS-Packet can contain only one encoding scheme or
compression rate, the compression rate may change only on CPS-Packet boundaries. Dynamic compression can
be performed between all ADPCM compression rates.
The second format, Format B, uses two time slots on the H.100/H.110 bus to transfer a single PCM/ADPCM
sample. Using two time slots will provide explicit indication of PCM or ADPCM sample in both the Tx and Rx
direction. This will allow for dynamic switching between PCM and ADPCM encoding schemes.
Both Format A and B allow the MT90502 to send a reset signal to the external decompressor to indicate the end of
a silent period. For silence suppression to function properly, both the ADPCM compressor and decompressor must
be synchronously reset in between continuous talk spurts. This reset must take place before each non-silent
packet that was preceded by a silent packet, given that silence suppression is enabled. The external
decompressor must reset itself when it sees either b7 or b0, depending on the placement of ADPCM nibbles, is set
in ADPCM samples. For Format B, a reset signal (PCM-R=11) will also be given when a voice (non-padding)
sample is received that was preceded by a padding sample.
CPS-Packet Length
TDM Data Formats
The TX CPS-Packet Circular Buffers are 256-bytes in size, located in TX SSRAM at
addresses +4000h to +BF00h, +8000h to +17F00h, +10000h to +2FF00h and +20000h to
+5FF00h for 128, 256, 512 and 1023 channels respectively.
Number of consecutive Circular Buffers is N = {128, 256, 512, 1023}
+(100h*(N-2))
+(100h*(N-1))
+100h
+0h
Figure 5 - TX CPS-Packet Circular Buffers
CPS-Packet Circular Buffers
(one table only, in SSRAM)
CPS-Pk Circ Buf N-1
CPS-Pk Circ Buf N-2
Zarlink Semiconductor Inc.
CPS-Pk Circ Buf 0
CPS-Pk Circ Buf 1
MT90502
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Data Sheet