mt90502ag2 Zarlink Semiconductor, mt90502ag2 Datasheet - Page 119
mt90502ag2
Manufacturer Part Number
mt90502ag2
Description
Multi-channel Aal2 Sar
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT90502AG2.pdf
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Address: 204h
Label: status0_ie
Reset Value: 0000h
mema_sdram_parity_error0_ie
mema_sdram_parity_error1_ie
memb_sdram_parity_error0_ie
memb_sdram_parity_error1_ie
mema_ssram_parity_error0_ie
mema_ssram_parity_error1_ie
memb_ssram_parity_error0_ie
memb_ssram_parity_error1_ie
memb_bad_cpu_access_ie
sdrama_too_late_ie
sdramb_too_late_ie
reserved
Label
Table 46 - Main Interrupt Enable Register
2
3
4
5
6
7
8
9
10
15:11
Bit Position Type
0
1
Zarlink Semiconductor Inc.
IE
IE
IE
IE
IE
IE
IE
IE
IE
RO
IE
IE
MT90502
When ‘1’ and the corresponding status bit is ‘1’ an interrupt
will be generated.
When ‘1’ and the corresponding status bit is ‘1’ an interrupt
will be generated.
When ‘1’ and the corresponding status bit is ‘1’ an interrupt
will be generated.
When ‘1’ and the corresponding status bit is ‘1’ an interrupt
will be generated.
When ‘1’ and the corresponding status bit is ‘1’ an interrupt
will be generated.
When ‘1’ and the corresponding status bit is ‘1’ an interrupt
will be generated.
When ‘1’ and the corresponding status bit is ‘1’ an interrupt
will be generated.
When ‘1’ and the corresponding status bit is ‘1’ an interrupt
will be generated.
When ‘1’ and the corresponding status bit is ‘1’ an interrupt
will be generated.
When ‘1’ and the corresponding status bit is ‘1’ an interrupt
will be generated.
When ‘1’ and the corresponding status bit is ‘1’ an interrupt
will be generated.
Reserved. Always read as “0000_0”
119
Description
Data Sheet
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