mt90502ag2 Zarlink Semiconductor, mt90502ag2 Datasheet - Page 141

no-image

mt90502ag2

Manufacturer Part Number
mt90502ag2
Description
Multi-channel Aal2 Sar
Manufacturer
Zarlink Semiconductor
Datasheet
Address: 502h
Label: status0
Reset Value: 0000h
cps_packet_refused_error
txsar_wbcache_overflow
txtdm_wcache_overflow
packet_fifo_overflow
misaligned_flag
bad_idle_code
short_packet
dcoffset_overflow
Reserved
Label
Table 93 - TDM TX Status Register (continued)
Bit Position
15:13
10
11
12
5
6
7
8
9
Zarlink Semiconductor Inc.
MT90502
Type
ROL
ROL
ROL
ROL
ROL
ROL
ROL
ROL
ROL
141
CPS-Packet could not be written because all 512
descriptors for the VC were occupied.
The 64 X 21 TX SAR write back cache overflow.
The 128 X 72 byte write cache overflow.
The 1024 X 41 packet FIFO overflow.
HDLC Packet got a misaligned flag (not aligned on a
byte boundary)
HDLC Packet got idle code in the middle of a packet!
HDLC Packet was too short (0 data bytes!)
DC offset value caused a linear value to be calculated
as more than 4096
Reserved. Always read as “000”
Description
Data Sheet

Related parts for mt90502ag2