mt90502ag2 Zarlink Semiconductor, mt90502ag2 Datasheet - Page 65

• Manufacturer Part Number: mt90502ag2
• Description: Multi-channel Aal2 Sar
• Manufacturer: Zarlink Semiconductor

2.5.2
The RX CAM generates a map that indicates which ADPCM channel, PCM channel or HDLC stream TSSTs are
associated on the TDM bus. There are 1024 entries in RX CAM; the first entry is the permanent start entry for the
map thus does not point to any TSST. The remaining 1023 entries are usable, each of which consists of:
•
•
•
Like the TX CAM, all entries in the RX CAM must be linked sequentially in TSST order.
2.5.3
When servicing PCM/ADPCM channels, a byte is read every frame from the external circular buffers and
transmitted onto the TDM bus. PCM/ADPCM channels can be configured to perform write backs to the circular
buffers after the read has been completed. This will ensure erroneous data will not be transmitted onto the TDM bus
while an underrun condition occurs. The WB (Write Back type) bits in the RX Control Memory determine what is
written back: tone/silent pattern (programmable in silent_pattern_reg 410h) or no Write Back. The PCM/ADPCM
entry in RX Control Memory contains several fields that control underrun detection:
•
•
For underrun detection to work properly, all RX CPS-packet circular buffer contents, including parity bit, must be
initialized to zero.
RX Channel Association Memory
+0
+2
+4
+6
Fields in Plain are written to by the CPU/Software.
RX TDM CAM structures are 8 bytes is size, located in internal memory at addresses 6000h to 7FF8h.
HDLC Stream/xxPCM Ch. No.: Used to find an entry in RX TDM Control Memory (see Figure 30 and Figure 31).
Link to next entry: Pointer to the next entry in the linked list. 000h means end of linked list, return to start.
Entry 0 in the linked list is always the start of frame and never points to a valid TDM channel.
the PCM channel/ADPCM channel/HDLC stream number, or Loopback channel number.
the TSST number
the pointer to the next mapped entry. Note that the final entry in the map must always point back to the
start entry.
16-bit free-running underrun counter which counts the number of underruns that have occurred on this
channel
The UC (Underrun Count enable) bit enables the counter. The PCM/ADPCM control structure also
contains the number of the PCM/ADPCM channel that is managed by the control entry.
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
RX Channel Association Memory
RX Channel Underrun Condition
0
HDLC Stream/xxPCM Ch. Number
Figure 29 - RX Channel Association Memory (RX CAM)
TSST [11:0]
Link to next entry
Zarlink Semiconductor Inc.
MT90502
65
+0
+2
+4
+6
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
1
TSST [11:0]
Link to next entry
LLL Ch. Number
Reserved
Data Sheet