mt90502ag2 Zarlink Semiconductor, mt90502ag2 Datasheet - Page 23

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mt90502ag2

Manufacturer Part Number
mt90502ag2
Description
Multi-channel Aal2 Sar
Manufacturer
Zarlink Semiconductor
Datasheet
cpu_mode
* The cpu_ale pin is interpreted in all modes. However, it is not necessary in the non-multiplexed modes and can be tied to VCC.
* *The address placed on the cpu_a[14:0] pin is a word address in 16-bit mode and a byte address in 8-bit mode. The address, when
placed on the cpu_d pins, is always a byte address.
read_burst_length
reserved
access_req
extended_a[3:1]
0000
0001
0010
0100
0101
[3:0]
0011
0110
0111
1xxx
Field
Intel, 16 bit data bus,
Intel, 16 bit data bus,
bus, non-multiplexed
bus, non-multiplexed
Motorola, 16 bit data
Motorola, 16 bit data
Intel, 8 bit data bus,
Intel, 8 bit data bus,
Motorola, 8 bit data
Motorola, 8 bit data
bus, multiplexed
bus, multiplexed
non-multiplexed
non-multiplexed
Interface Type
multiplexed
multiplexed
Reserved
Bit
11:9
6:0
7
8
Type
RW
RW
RO
PC
Table 13 - CPU Interface Mode Selection
Table 14 - Control Register (000h)
cpu_ale*
cpu_ale*
cpu_ale*
cpu_ale*
cpu_ale*
cpu_ale*
cpu_ale*
cpu_ale*
Reset
01h
0h
0h
0h
ale
Zarlink Semiconductor Inc.
Number of words to prefetch: 00h = 128; 01h= 1; 02h = 2, etc.
This field is set to 01h for individual (non-sequential) reads.
Reserved.
Set by software when an extended access is initialized. Reset
by hardware when the access is completed. Used for extended
indirect access only.
Extended address bits 3:1. Invalid for extended direct access.
MT90502
cpu_a[14:0]** (byte
cpu_a[14:0]** (byte
23
cpu_a[14:8]** &
(word address)
(word address)
(word address)
(word address)
cpu_a[14:8]**&
(byte address)
(byte address)
address pins
cpu_a[14:0]**
cpu_d[15:1]**
cpu_a[14:0]**
cpu_d[15:1]**
cpu_d[7:0]
cpu_d[7:0]
address)
address)
Description
cpu_d[15:0]
cpu_d[15:0]
cpu_d[15:0]
cpu_d[15:0]
cpu_d[7:0]
cpu_d[7:0]
cpu_d[7:0]
cpu_d[7:0]
data pins
direct_access
cpu_a_das
cpu_a_das
cpu_a_das
cpu_a_das
cpu_a_das
cpu_a_das
cpu_a_das
cpu_a_das
Data Sheet

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