LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 250

• Manufacturer Part Number: LPC1767FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1767FBD100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC17
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4967; 935289808551

NXP Semiconductors
Table 248. Select Endpoint command bit description
UM10360
User manual
Bit
0
1
2
3
4
5
6
7
Symbol
FE
ST
STP
PO
EPN
B_1_FULL
B_2_FULL
-
11.12.11 Select Endpoint/Clear Interrupt (Command: 0x40 - 0x5F, Data: read 1
Value
0
1
0
1
0
1
0
1
0
1
0
1
0
1
-
byte)
Commands 0x40 to 0x5F are identical to their Select Endpoint equivalents, with the
following differences:
•
•
•
They clear the bit corresponding to the endpoint in the USBEpIntSt register.
In case of a control OUT endpoint, they clear the STP and PO bits in the
corresponding Select Endpoint Register.
Reading one byte is obligatory.
Description
Full/Empty. This bit indicates the full or empty status of the endpoint buffer(s).
For IN endpoints, the FE bit gives the ANDed result of the B_1_FULL and
B_2_FULL bits. For OUT endpoints, the FE bit gives ORed result of the
B_1_FULL and B_2_FULL bits. For single buffered endpoints, this bit simply
reflects the status of B_1_FULL.
For an IN endpoint, at least one write endpoint buffer is empty.
For an OUT endpoint, at least one endpoint read buffer is full.
Stalled endpoint indicator.
The selected endpoint is not stalled.
The selected endpoint is stalled.
SETUP bit: the value of this bit is updated after each successfully received
packet (i.e. an ACKed package on that particular physical endpoint).
The STP bit is cleared by doing a Select Endpoint/Clear Interrupt on this
endpoint.
The last received packet for the selected endpoint was a SETUP packet.
Packet over-written bit.
The PO bit is cleared by the ‘Select Endpoint/Clear Interrupt’ command.
The previously received packet was over-written by a SETUP packet.
EP NAKed bit indicates sending of a NAK. If the host sends an OUT packet to a
filled OUT buffer, the device returns NAK. If the host sends an IN token packet
to an empty IN buffer, the device returns NAK.
The EPN bit is reset after the device has sent an ACK after an OUT packet or
when the device has seen an ACK after sending an IN packet.
The EPN bit is set when a NAK is sent and the interrupt on NAK feature is
enabled.
The buffer 1 status.
Buffer 1 is empty.
Buffer 1 is full.
The buffer 2 status.
Buffer 2 is empty.
Buffer 2 is full.
Reserved, user software should not write ones to reserved bits. The value read
from a reserved bit is not defined.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 August 2010
Chapter 11: LPC17xx USB device controller
UM10360
© NXP B.V. 2010. All rights reserved.
0
0
0
0
0
0
NA
Reset value
0
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