LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 666

• Manufacturer Part Number: LPC1767FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1767FBD100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC17
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4967; 935289808551

NXP Semiconductors
UM10360
User manual
34.2.4.3.4 Condition flags
34.2.4.3.5 Examples
These instructions do not change the flags.
•
•
bit[0] of the loaded value must be 1 for correct execution, and a branch occurs to this
halfword-aligned address
if the instruction is conditional, it must be the last instruction in the IT block.
STR
LDRSB R0, [R5, R1, LSL #1] ; Read byte value from an address equal to
STR
All information provided in this document is subject to legal disclaimers.
R0, [R5, R1]
R0, [R1, R2, LSL #2] ; Stores R0 to an address equal to sum of R1
Rev. 2 — 19 August 2010
; Store value of R0 into an address equal to
; sum of R5 and R1
; sum of R5 and two times R1, sign extended it
; to a word value and put it in R0
; and four times R2
Chapter 34: Appendix: Cortex-M3 user guide
UM10360
© NXP B.V. 2010. All rights reserved.
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