LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 545

• Manufacturer Part Number: LPC1767FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1767FBD100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC17
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4967; 935289808551

NXP Semiconductors
26.4 Functional description
UM10360
User manual
26.4.1.1 Quadrature input signals
26.4.1 Input signals
The QEI module interprets the two-bit gray code produced by a quadrature encoder wheel
to integrate position over time and determine direction of rotation. In addition, it can
capture the velocity of the encoder wheel.
The QEI module supports two modes of signal operation: quadrature phase mode and
clock/direction mode. In quadrature phase mode, the encoder produces two clocks that
are 90 degrees out of phase; the edge relationship is used to determine the direction of
rotation. In clock/direction mode, the encoder produces a clock signal to indicate steps
and a direction signal to indicate the direction of rotation.).
This mode is determined by the SigMode bit of the QEI Configuration (QEICONF) register
(See
PhA pin functions as the direction signal and PhB pin functions as the clock signal for the
counters, etc. When the SigMode bit = 0, the PhA pin and PhB pins are decoded by the
quadrature decoder. In this mode the quadrature decoder produces the direction and
clock signals for the counters, etc. In both modes the direction signal is subject to the
effects of the direction invert (DIRINV) bit.
When edges on PhA lead edges on PhB, the position counter is incremented. When
edges on PhB lead edges on PhA, the position counter is decremented. When a rising
and falling edge pair is seen on one of the phases without any edges on the other, the
direction of rotation has changed.
Table 479. Encoder states
Table 480. Encoder state transitions
[1]
Interchanging of the PhA and PhB input signals are compensated by complementing the
DIR bit. When set = 1, the direction inversion bit (DIRINV) complements the DIR bit.
Phase A
1
1
0
0
from state
1
2
3
4
4
3
2
1
All other state transitions are illegal and should set the ERR bit.
Table
485). When the SigMode bit = 1, the quadrature decoder is bypassed and the
All information provided in this document is subject to legal disclaimers.
Phase B
0
1
1
0
to state
2
3
4
1
3
2
1
4
Rev. 2 — 19 August 2010
Chapter 26: LPC17xx Quadrature Encoder Interface (QEI)
[1]
state
1
2
3
4
Direction
positive
negative
UM10360
© NXP B.V. 2010. All rights reserved.
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