LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 641

• Manufacturer Part Number: LPC1767FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1767FBD100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC17
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4967; 935289808551

33.1 Features
33.2 Introduction
33.3 Description
33.4 Pin Description
UM10360
User manual
Debug and trace functions are integrated into the ARM Cortex-M3. Serial wire debug and
trace functions are supported in addition to a standard JTAG debug and parallel trace
functions. The ARM Cortex-M3 is configured to support up to eight breakpoints and four
watchpoints.
Debugging with the LPC17xx defaults to JTAG. Once in the JTAG debug mode, the debug
tool can switch to Serial Wire Debug mode.
Trace can be done using either a 4-bit parallel interface or the Serial Wire Output. When
the Serial Wire Output is used, less data can be traced, but it uses no application related
pins. Parallel trace has a greater bandwidth, but uses 5 functional pins that may be
needed in the application. Note that the trace function available for the Cortex-M3 is
functionally very different than the trace that was available for previous ARM7 based
devices, using only 5 pins instead of 10.
The tables below indicate the various pin functions related to debug and trace. Some of
these functions share pins with other functions which therefore may not be used at the
same time. Use of the JTAG port excludes use of Serial Wire Debug and Serial Wire
Output. Use of the parallel trace requires 5 pins that may be part of the user application,
limiting debug possibilities for those features. Trace using the Serial Wire Output does not
have this limitation, but has a limited bandwidth.
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UM10360
Chapter 33: LPC17xx JTAG, Serial Wire Debug (SWD), and
Trace
Rev. 2 — 19 August 2010
Supports both standard JTAG and ARM Serial Wire Debug modes.
Direct debug access to all memories, registers, and peripherals.
No target resources are required for the debugging session.
Trace port provides CPU instruction trace capability. Output can be via a 4-bit trace
data port, or Serial Wire Viewer.
Eight Breakpoints. Six instruction breakpoints that can also be used to remap
instruction addresses for code patches. Two data comparators that can be used to
remap addresses for patches to literal values.
Four data Watchpoints that can also be used as trace triggers.
Instrumentation Trace Macrocell allows additional software controlled trace.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 August 2010
© NXP B.V. 2010. All rights reserved.
User manual
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