EZ80F91AZ050EG Zilog, EZ80F91AZ050EG Datasheet - Page 219

IC ACCLAIM MCU 256KB 144LQFP

EZ80F91AZ050EG

Manufacturer Part Number
EZ80F91AZ050EG
Description
IC ACCLAIM MCU 256KB 144LQFP
Manufacturer
Zilog
Series
eZ80® Acclaim!®r
Datasheets

Specifications of EZ80F91AZ050EG

Core Processor
Z8
Core Size
8-Bit
Speed
50MHz
Connectivity
Ethernet, I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
144-LQFP
Processor Series
EZ80F91x
Core
eZ80
Data Bus Width
8 bit
Data Ram Size
16 KB
Interface Type
I2C, IrDA, SPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
eZ80F910300ZCOG
Minimum Operating Temperature
- 40 C
For Use With
269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details
Other names
269-3867
EZ80F91AZ050EG

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EZ80F91AZ050EG
Manufacturer:
Zilog
Quantity:
10 000
Table 116. SPI Transmit Shift Register (SPI_TSR = 00BCh)
Table 117. SPI Receive Buffer Register
PS019215-0910
Bit
Reset
CPU Access
Note: W = Write Only.
Bit 
Position
[7:0]
TX_DATA
Bit
Reset
CPU Access
Note: R = Read Only.
Bit 
Position
[7:0]
RX_DATA
SPI Receive Buffer Register
The SPI Receive Buffer register (SPI_RBR) is used by the SPI slave to receive data from
the serial bus. The SPIF bit must be cleared prior to a second transfer of data from the shift
register; otherwise, an overrun condition exists. In the event of an overrun, the byte that
causes the overrun is lost.
The SPI Receive Buffer Read Only register shares the same address space as the SPI
Transmit Shift Write Only register. See
Value
00h–FFh SPI transmit data.
Value
00h–FFh
W
X
X
R
7
7
Description
Description
SPI received data.
W
X
X
R
6
6
W
X
X
R
5
5
(SPI_RBR = 00BCh)
W
X
X
R
4
4
Table
W
R
X
X
3
3
117.
W
R
X
X
2
2
W
R
X
X
1
1
Product Specification
Serial Peripheral Interface
W
R
X
X
0
0
eZ80F91 MCU
210

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