EZ80F91AZ050EG Zilog, EZ80F91AZ050EG Datasheet - Page 62

• Manufacturer Part Number: EZ80F91AZ050EG
• Description: IC ACCLAIM MCU 256KB 144LQFP
• Manufacturer: Zilog
• Series: eZ80® Acclaim!®r

Specifications of EZ80F91AZ050EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: Ethernet, I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 144-LQFP
• Processor Series: EZ80F91x
• Core: eZ80
• Data Bus Width: 8 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, IrDA, SPI, UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: eZ80F910300ZCOG
• Minimum Operating Temperature: - 40 C
• For Use With: 269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-3867; EZ80F91AZ050EG

PS019215-0910
Mode 7(Input)
Mode 2
Mode 6
Mode 8
Mode 9
* Reading from the Px_DR returns
System Clock
the value stored in this register
* Writing to the Px_DR stores
Data
Alternate Function Output
the value in this register
Figure 5. GPIO Port Pin Block Diagram for Input and Interrupt Modes
Figure 6. GPIO Port Pin Block Diagram for Output and Input/Output Mode
D
Px _DR*
Q
Q
Simplified GPIO Port Block Diagram for Modes 2, 6, 7(input), 8, and 9
Simplified GPIO Port Block Diagram for Modes 1, 3, 4, and 7 (Output)
Mode 3
Mode 4
Mode 1
Mode 7 (Output)
GPIO Output Buffer
Tristated for
modes 2,6,8,9
and 7(Input)
ENB
SysClock
Default Value
Mode 7(Input)
Clear Interrupt
Modes 6,8,9
D
GPIO Port Pin
Q
GPIO
Px_DR*
D
Output Buffer
ENB
Q
General-Purpose Input/Output
External Pull-down resistor
required for Mode 4
Product Specification
(Open source)
GPIO
Interrupt
Logic
Pin
Port
Input to chip
eZ80F91 MCU
Alternate
Function
VDD
Input
Interrupt
required for
(open drain)
External
Pull-up resistor
Mode 3
53