EZ80F91AZ050EG Zilog, EZ80F91AZ050EG Datasheet - Page 292

• Manufacturer Part Number: EZ80F91AZ050EG
• Description: IC ACCLAIM MCU 256KB 144LQFP
• Manufacturer: Zilog
• Series: eZ80® Acclaim!®r

Specifications of EZ80F91AZ050EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: Ethernet, I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 144-LQFP
• Processor Series: EZ80F91x
• Core: eZ80
• Data Bus Width: 8 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, IrDA, SPI, UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: eZ80F910300ZCOG
• Minimum Operating Temperature: - 40 C
• For Use With: 269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-3867; EZ80F91AZ050EG

Table 170. Opcode Map—Second Opcode After 0EDh
PS019215-0910
Legend
of Second
First Operand
Opcode
A
B
C
D
E
F
0
1
2
3
4
5
6
7
8
9
Nibble
Upper
Note: n = 8-bit data; Mmn = 16- or 24-bit addr or data; d = 8-bit two’s-complement displacement.
D,(BC)
B,(BC)
H,(C)
LDIR
B,(n)
D,(n)
H,(n)
IBN
IN0
IN0
IN0
LDI
IN
IN
0
Lower Nibble of 2nd Opcode
(BC),D
(BC),H
(BC),B
OUT0
OUT0
OUT0
LD IY,
CPIR
(n),B
(n),D
(n),H
OUT
OUT
OUT
(HL)
CPI
4
1
HL,BC
SBC
2
LEA HL
LEA IX
HL,BC
HL,DE
HL,SP
HL,HL
INIMR OTIMR INI2R
INIRX OTIRX
,IX+d
,IX+d
INIM
IX+d
IX+d
SBC
SBC
SBC
SBC
INIR
LEA
LEA
BC,
DE,
INI
2
Second Operand
LEA HL
(Mmn),
(Mmn),
(Mmn),
(Mmn),
LEA IY
OTIM
OUTI OUTI2
OTIR OTI2R
,IY+d
,IY+d
IY+d
IY+d
LEA
LEA
BC,
DE,
BC
DE
SP
Mnemonic
LD
LD
LD
HL
LD
3
LEA IX,
A,(HL)
TSTIO
NEG
IY+d
TST
TST
TST
TST
TST
INI2
A,D
A,H
A,B
A,n
4
n
LEA IY,
RETN
IX+d
IX+d
PEA
5
IY+d
IM 0
IM 1
PEA
SLP
6
Lower Nibble (Hex)
LD BC,
LD DE,
LD HL,
LD IX,
RRD
(HL)
(HL)
(HL)
(HL)
I,HL
HL,I
LD
I,A
LD
A,I
LD
LD
7
LDDR CPDR
C,(C)
C,(n)
E,(C)
L,(C)
A,(C)
E,(n)
L,(n)
A,(n)
LDD
IN0
IN0
IN0
IN0
IN
IN
IN
IN
8
OUT0
OUT0
OUT0
OUT0
(C),C
(C),E
(C),A
(n),C
(n),E
(n),A
(C),L
(n),L
OUT
OUT
OUT
OUT
CPD
9
INDMR OTDMR IND2R
INDRX OTDRX
HL,BC
HL,DE
HL,HL
HL,SP
INDM OTDM
INDR
ADC
ADC
ADC
ADC
IND
A
(Mmn)
(Mmn)
(Mmn)
(Mmn)
OUTD OUTD2
OTDR OTD2R
BC,
DE,
HL,
SP,
LD
LD
LD
LD
B
Product Specification
eZ80
IND2
TST
TST
TST
TST
MLT
MLT
MLT
MLT
A,C
A,E
A,A
A,L
BC
DE
HL
SP
C
®
STMIX RSMIX
MB,A
CPU Instruction Set
RETI
LD
D
(HL),IY
A,MB
IM 2
LD
LD
E
LD(HL),
(HL),
(HL),
(HL),
RLD
R,A
A,R
BC
DE
LD
LD
HL
LD
LD
LD
IX
F
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