DF2552BR26DV Renesas Electronics America, DF2552BR26DV Datasheet - Page 406

• Manufacturer Part Number: DF2552BR26DV
• Description: IC H8S/2552 MCU FLASH 176-LFBGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2500r

Specifications of DF2552BR26DV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 26MHz
• Connectivity: I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 176-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 11 8-Bit Timers (TMR)
Note:
Rev. 6.00 Sep. 24, 2009 Page 358 of 928
REJ09B0099-0600
Bit
4
3
2
1
0
Bit Name
CCLR1
CCLR0
CKS2
CKS1
CKS0
*
If the count input of channel 0 (channel 2) is the TCNT1 (TCNT3) overflow signal and
that of channel 1 (channel 3) is the TCNT0 (TCNT2) compare-match signal, no
incrementing clock will be generated. Do not use this setting.
Initial
Value
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
Description
Counter Clear 1 and 0
These bits select the method by which TCNT is cleared
00: Clearing is disabled
01: Cleared on compare-match A
10: Cleared on compare-match B
11: Cleared on rising edge of external reset input
Clock Select 2 to 0
The input clock can be selected from three clocks divided
from the system clock (φ). When use of an external clock is
selected, three types of count can be selected: at the rising
edge, the falling edge, and both rising and falling edges.
000: Clock input disabled
001: φ/8 internal clock source, counted on the falling edge
010: φ/64 internal clock source, counted on the falling edge
011: φ/8192 internal clock source, counted on the falling
100: For channel 0: Counted on TCNT1 overflow signal*
101: External clock source, counted at rising edge
110: External clock source, counted at falling edge
111: External clock source, counted at both rising and
For channel 1: Counted on TCNT0 compare-match A
signal*
For channel 2: Counted on TCNT3 overflow signal*
For channel 3: Counted on TCNT2 compare-match A
signal*
edge
falling edges