DF2552BR26DV Renesas Electronics America, DF2552BR26DV Datasheet - Page 738

IC H8S/2552 MCU FLASH 176-LFBGA

DF2552BR26DV

Manufacturer Part Number
DF2552BR26DV
Description
IC H8S/2552 MCU FLASH 176-LFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2500r
Datasheets

Specifications of DF2552BR26DV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
26MHz
Connectivity
I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
104
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
176-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2552BR26DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 20 Flash Memory
(3)
When flash memory is programmed, the programming destination address on the user MAT and
the program data must be passed to the downloaded programming program.
1. The start address of the programming destination on the user MAT must be stored in a general
2. The program data for the user MAT must be prepared in the consecutive area. The program
For details on the program processing procedure, see section 20.4.2, User Program Mode.
(a) Flash multipurpose address area parameter (FMPAR: general register ER1 of CPU)
This parameter stores the start address of the programming destination on the user MAT.
When the address in the area other than flash memory space is set, an error occurs.
The start address of the programming destination must be at the 128-byte boundary. If this
boundary condition is not satisfied, an error occurs. The error occurrence is indicated by the WA
bit in FPFR.
Rev. 6.00 Sep. 24, 2009 Page 690 of 928
REJ09B0099-0600
Bit
31 to 0 MOA31 to
register ER1. This parameter is called as FMPAR (flash multipurpose address area parameter).
Since the program data is always in units of 128 bytes, the lower eight bits (A7 to A0) must be
H'00 or H'80 as the boundary of the programming start address on the user MAT.
data must be in the consecutive space which can be accessed by using the MOV.B instruction
of the CPU and in other than the flash memory space.
When data to be programmed does not satisfy 128 bytes, the 128-byte program data must be
prepared by filling with the dummy code H'FF.
The start address of the area in which the prepared program data is stored must be stored in a
general register ER0. This parameter is called as FMPDR (flash multipurpose data destination
area parameter).
Programming Execution
Bit Name
MOA0
Initial
Value
R/W
R/W
Description
Store the start address of the programming destination
on the user MAT. The consecutive 128-byte
programming is executed starting from the specified start
address of the user MAT. Therefore, the specified
programming start address becomes a 128-byte
boundary and MOA6 to MOA0 are always 0.

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