DF2552BR26DV Renesas Electronics America, DF2552BR26DV Datasheet - Page 751

• Manufacturer Part Number: DF2552BR26DV
• Description: IC H8S/2552 MCU FLASH 176-LFBGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2500r

Specifications of DF2552BR26DV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 26MHz
• Connectivity: I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 176-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

20.4.2
The user MAT can be programmed/erased in user program mode. (The user boot MAT cannot be
programmed/erased.)
Programming/erasing is executed by downloading the program in the microcomputer.
The overview flow is shown in figure 20.9.
High voltage is applied to internal flash memory during the programming/erasing processing.
Therefore, transition to reset or hardware standby must not be executed. Doing so may cause
damage or destroy flash memory. If reset is executed accidentally, reset must be released after the
reset input period of 100 μs, which is longer than usual.
User Program Mode
program data is prepared
transferred to the on-chip
Programming/erasing
Programming/erasing
When programming,
Programming/erasing
procedure program is
RAM and executed
FLSHE = 1?
start
end
Yes
Figure 20.9 Programming/Erasing Overview Flow
No
1.
2.
3.
4.
5.
RAM emulation mode must be canceled in advance. Download
cannot be executed in emulation mode.
When the program data is made by means of emulation, change
the download destination by the FTDAR register. Note that the
download area and the emulation area will overlap if FTDAR is
H'04.
Set FLSHE bit in SYSCR2 register to 1.
Programming/erasing is executed only in the on-chip RAM.
However, if program data is in a consecutive area and can be
accessed by the MOV.B instruction of the CPU like SRAM or
ROM, the program data can be in an external space.
After programming/erasing is finished, the FLSHE bit is cleared
to 0 and protected.
Rev. 6.00 Sep. 24, 2009 Page 703 of 928
Section 20 Flash Memory
REJ09B0099-0600