PIC24FJ256DA210T-I/BG Microchip Technology, PIC24FJ256DA210T-I/BG Datasheet - Page 256

16-bit, 256KB Flash, 96K RAM, USB, Graphics 121 XBGA 10x10x1.20mm T/R

PIC24FJ256DA210T-I/BG

Manufacturer Part Number
PIC24FJ256DA210T-I/BG
Description
16-bit, 256KB Flash, 96K RAM, USB, Graphics 121 XBGA 10x10x1.20mm T/R
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets

Specifications of PIC24FJ256DA210T-I/BG

Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, GFX, LVD, POR, PWM, WDT
Number Of I /o
84
Program Memory Size
256KB (85.5K x 24)
Program Memory Type
FLASH
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
121-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24FJ256DA210T-I/BG
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC24FJ256DA210 FAMILY
REGISTER 18-4:
DS39969B-page 256
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
DPPULUP
R/W-0
U-0
These bits are only used in Host mode; do not use in Device mode.
Unimplemented: Read as ‘0’
DPPULUP: D+ Pull-up Enable bit
1 = D+ data line pull-up resistor is enabled
0 = D+ data line pull-up resistor is disabled
DMPULUP: D- Pull-up Enable bit
1 = D- data line pull-up resistor is enabled
0 = D- data line pull-up resistor is disabled
DPPULDWN: D+ Pull-Down Enable bit
1 = D+ data line pull-down resistor is enabled
0 = D+ data line pull-down resistor is disabled
DMPULDWN: D- Pull-Down Enable bit
1 = D- data line pull-down resistor is enabled
0 = D- data line pull-down resistor is disabled
VBUSON: V
1 = V
0 = V
OTGEN: OTG Features Enable bit
1 = USB OTG is enabled; all D+/D- pull-up and pull-down bits are enabled
0 = USB OTG is disabled; D+/D- pull-up and pull-down bits are controlled in hardware by the settings
VBUSCHG: V
1 = V
0 = V
VBUSDIS: V
1 = V
0 = V
DMPULUP
R/W-0
U-0
of the HOSTEN and USBEN (U1CON<3,0>) bits
BUS
BUS
BUS
BUS
BUS
BUS
U1OTGCON: USB ON-THE-GO CONTROL REGISTER
line is powered
line is not powered
line is set to charge to 3.3V
line is discharged through a resistor
line is not discharged
line is set to charge to 5V
BUS
BUS
W = Writable bit
‘1’ = Bit is set
DPPULDWN
BUS
Power-on bit
Discharge Enable bit
R/W-0
Charge Select bit
U-0
(1)
(1)
DMPULDWN
(1)
R/W-0
(1)
U-0
(1)
(1)
(1)
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
VBUSON
R/W-0
U-0
(1)
OTGEN
R/W-0
U-0
(1)
 2010 Microchip Technology Inc.
x = Bit is unknown
VBUSCHG
R/W-0
U-0
(1)
VBUSDIS
R/W-0
U-0
bit 8
bit 0
(1)

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