PIC24FJ256DA210T-I/BG Microchip Technology, PIC24FJ256DA210T-I/BG Datasheet - Page 276

• Manufacturer Part Number: PIC24FJ256DA210T-I/BG
• Description: 16-bit, 256KB Flash, 96K RAM, USB, Graphics 121 XBGA 10x10x1.20mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ256DA210T-I/BG

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, GFX, LVD, POR, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (85.5K x 24)
• Program Memory Type: FLASH
• Ram Size: 96K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 121-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC24FJ256DA210 FAMILY
REGISTER 19-2:
DS39969B-page 276
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9-8
bit 7-0
Note 1:
RADDR23 RADDR22
R-0, HSC
R/W-0
BUSY
If RADDR<23:16> = 00000000, then the last EDS address for Chip Select 2 will be 0xFFFFFF.
BUSY: Busy bit (Master mode only)
1 = Port is busy
0 = Port is not busy
Unimplemented: Read as ‘0’
ERROR: Error bit
1 = Transaction error (illegal transaction was requested)
0 = Transaction completed successfully
TIMEOUT: Time-Out bit
1 = Transaction timed out
0 = Transaction completed successfully
AMREQ: Alternate Master Request bit
1 = The Alternate Master is requesting use of EPMP
0 = The Alternate Master is not requesting use of EPMP
CURMST: Current Master bit
1 = EPMP access is granted to CPU
0 = EPMP access is granted to alternate master
MSTSEL<1:0>: Parallel Port Master Select bits
11 = Alternate master I/Os direct access (EPMP Bypass mode)
10 = Reserved
01 = Alternate master
00 = CPU
RADDR<23:16>: Parallel Master Port Reserved Address Space bits
R/W-0
U-0
—
PMCON2: EPMP CONTROL REGISTER 2
W = Writable bit
HS = Hardware Settable bit
‘1’ = Bit is set
RADDR21
R/C-0, HS
ERROR
R/W-0
RADDR20
R/C-0, HS
TIMEOUT
R/W-0
U = Unimplemented bit, read as ‘0’
HSC = Hardware Settable/Clearable bit
‘0’ = Bit is cleared
RADDR19
R-0, HSC
AMREQ
R/W-0
RADDR18
R-1, HSC
CURMST
R/W-0
(1)
 2010 Microchip Technology Inc.
C = Clearable bit
x = Bit is unknown
RADDR17
MSTSEL1
R/W-0
R/W-0
RADDR16
MSTSEL0
R/W-0
R/W-0
bit 8
bit 0