PM4328-PI PMC-Sierra, Inc., PM4328-PI Datasheet - Page 133

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PM4328-PI

Manufacturer Part Number
PM4328-PI
Description
Framer, T1|E1|T3 Standard Format, 324-BGA
Manufacturer
PMC-Sierra, Inc.
Datasheet

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STANDARD PRODUCT
DATASHEET
PMC-2011596
PROPRIETARY AND CONFIDENTIAL
Register 2000H: Master Test Register
PMCTST:
DBCTRL:
IOTST:
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
This register is used to select TECT3 test features. All bits, except for
PMCTST, are reset to zero by a hardware reset of the TECT3; a software
reset of the TECT3 does not affect the state of the bits in this register.
The PMCTST bit is used to configure the TECT3 for PMC's manufacturing
tests. When PMCTST is set to logic 1, the TECT3 microprocessor port
becomes the test access port used to run the PMC "canned" manufacturing
test vectors. The PMCTST bit is logically "ORed" with the IOTST bit, and can
only be cleared by setting CSB to logic 1.
The DBCTRL bit is used to pass control of the data bus drivers to the CSB
pin while IOTST is a logic 1. When the DBCTRL bit is set to logic 1, the CSB
pin controls the output enable for the data bus. While the DBCTRL bit is set,
holding the CSB pin high causes the TECT3 to drive the data bus and holding
the CSB pin low tri-states the data bus. The DBCTRL bit overrides the
HIZDATA bit. The DBCTRL bit is used to measure the drive capability of the
data bus driver pads. When IOTST and PMCTST are both logic 0, the
DBCTRL bit is ignored.
The IOTST bit is used to allow normal microprocessor access to the test
registers and control the test mode in each TSB block in the TECT3 for board
level testing. When IOTST is a logic 1, all blocks are held in test mode and
the microprocessor may write to a block's test mode 0 registers to manipulate
Type
R/W
R/W
W
W
W
ISSUE 1
Function
PMCTST
HIZDATA
DBCTRL
Unused
Unused
Unused
IOTST
HIZIO
120
Default
X
X
X
X
X
X
X
X
HIGH DENSITY T1/E1 FRAMER
AND M13 MULTIPLEXER
PM4328 TECT3

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