PM4328-PI PMC-Sierra, Inc., PM4328-PI Datasheet - Page 216

• Manufacturer Part Number: PM4328-PI
• Description: Framer, T1|E1|T3 Standard Format, 324-BGA
• Manufacturer: PMC-Sierra, Inc.

STANDARD PRODUCT
DATASHEET
PMC-2011596
PROPRIETARY AND CONFIDENTIAL
(CSB+RDB)
A[13:0]
Figure 79: Microprocessor Interface Read Timing
Notes on Microprocessor Interface Read Timing:
1. Output propagation delay time is the time in nanoseconds from the 1.4 Volt
2. Maximum output propagation delays are measured with a 100 pF load on the
3. A valid read cycle is defined as a logical OR of the CSB and the RDB signals.
4. In non-multiplexed address/data bus architectures, ALE should be held high
D[7:0]
INTB
ALE
point of the reference signal to the 1.4 Volt point of the output.
Microprocessor Interface data bus, (D[7:0]).
so parameters tSALR, tHALR, tVL, and tSLR are not applicable.
tS
ISSUE 1
ALR
tS
tV
AR
L
Valid
tS
LR
203
tP
Address
RD
tH
ALR
Valid Data
tZ
tZ
tH
RD
INTH
AR
HIGH DENSITY T1/E1 FRAMER
tH
LR
AND M13 MULTIPLEXER
PM4328 TECT3