PM4328-PI PMC-Sierra, Inc., PM4328-PI Datasheet - Page 49
PM4328-PI
Manufacturer Part Number
PM4328-PI
Description
Framer, T1|E1|T3 Standard Format, 324-BGA
Manufacturer
PMC-Sierra, Inc.
Datasheet
1.PM4328-PI.pdf
(250 pages)
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STANDARD PRODUCT
DATASHEET
PMC-2011596
Pin Name
ED[1]
ED[2]
ED[3]
ED[4]
ED[5]
ED[6]
ED[7]
ED[8]
ED[9]
ED[10]
ED[11]
ED[12]
ED[13]
ED[14]
ED[15]
ED[16]
ED[17]
ED[18]
ED[19]
ED[20]
ED[21]
ED[22]
ED[23]
ED[24]
ED[25]
ED[26]
ED[27]
ED[28]
PROPRIETARY AND CONFIDENTIAL
Type
Input
ISSUE 1
Pin
No.
AB4
AA3
P19
N20
N21
N22
A7
A2
T2
R4
A3
B4
N19
M22
D6
C7
P2
M1
D4
B6
C20
E22
A5
B5
L1
L2
A4
C5
Function
This signal shares a pin with the H-MVIP signal
CMVFPB. By default this input is CEFP.
Egress Data (ED[1:28]). The egress data streams to
be transmitted are input on these pins. When the
Clock Master modes are active, ED[x] is sampled on
the active edge of ECLK[x], except for Clock Master:
Serial Data and H-MVIP CCS, when ED[x] is sampled
on the active edge of ICLK[x]. When the Clock Slave
egress modes are active, ED[x] is sampled on the
active edge of CECLK, except for Clock Slave: Clear
channel mode when ED[x] is sampled on the active
edge of ECLK[x].
In E1 mode only ED[1:21] are used.
ED[1,5,9,13,17,21,25] share pins with the H-MVIP data
signals MVED[1:7]. ED[2,6,10,14,18,22,26] share pins
with the H-MVIP CAS signals CASED[1:7]. ED[1]
shares a pin with the DS3 system interface signal
TDATI. ED[2] shares a pin with the DS3 system
interface signal TFPI/TMFPI.
ED[7,8,11,12,15,16,19,20,23,24,27,28] shares pins
with the SBI interface add bus signals.
36
HIGH DENSITY T1/E1 FRAMER
AND M13 MULTIPLEXER
PM4328 TECT3
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