PM4328-PI PMC-Sierra, Inc., PM4328-PI Datasheet - Page 153

• Manufacturer Part Number: PM4328-PI
• Description: Framer, T1|E1|T3 Standard Format, 324-BGA
• Manufacturer: PMC-Sierra, Inc.

STANDARD PRODUCT
DATASHEET
PMC-2011596
12.4 Using the Internal FDL Transmitter
PROPRIETARY AND CONFIDENTIAL
The bit error rate for T1 ESF can be calculated from the one-second PMON
CRCE count by the following equation:
Bit Error Rate = 1 - 10
Figure 31: CRCE Count vs. BER (T1 ESF mode)
For T1 SF format, the CRCE and FER counts are identical, but the FER counter
is smaller and should be ignored.
Figure 32: CRCE Count vs. BER (T1 SF mode)
It is important to note that access rate to the TDPR registers is limited by the rate
of the internal high-speed system clock which is either the DS3, DS1 or E1 clock.
Consecutive accesses to the TDPR Configuration, TDPR Interrupt Status/UDR
1.00E-02
1.00E-03
1.00E-04
1.00E-05
1.00E-06
1.00E-07
0
50
- 2
R
E
B
0
1
( x
t e
a
o
)
r
r r
i t
20
18
16
14
12
10
0
4
2
8
6
ISSUE 1
0
100
æ
ç
ç
ç
ç ç
è
log
æ
ç
è
200
1
-
24
8000
*
24
193
150
BEE
Bit Error Event Count Per Second
400
CRCE
ö
÷
ø
ö
÷
÷
÷
÷ ÷
ø
Many 1 Second Intervals
Average Count Over
200
600
140
250
800
1000
300
1200
350
HIGH DENSITY T1/E1 FRAMER
AND M13 MULTIPLEXER
PM4328 TECT3